External Cleanup PLL and HSS Link closed Loop Stability Analysis
Seminar: External Cleanup PLL and HSS Link closed Loop Stability Analysis
by Don Pakbaz
Date and Time
Location
Hosts
Registration
- Date: 15 Mar 2018
- Time: 12:00 PM to 01:00 PM
- All times are (UTC-05:00) Eastern Time (US & Canada)
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- 1000 River Street
- Essex Junction, Vermont
- United States 05452
- Building: Building 969
- Room Number: Presentation Center
- Contact Event Host
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If you do not have a badge with access to the Essex Junction, VT GLOBALFOUNDRIES/IBM site, send email to jeanne.bickford@globalfoundries.com by end of day on Monday, March 12. Details on where to park and a map will be sent to you via email.
Plan on arriving at the Essex Junction site by 11:45 AM to sign in.
- Co-sponsored by BTV GLOBALFOUNDRIES/IBM Technical Vitality Council
- Starts 23 February 2018 07:29 PM
- Ends 23 February 2018 07:30 PM
- All times are (UTC-05:00) Eastern Time (US & Canada)
- No Admission Charge
Speakers
Don
Topic:
Seminar: External Cleanup PLL and HSS Link closed Loop Stability Analysis
Abstract:
This seminar describes the analysis of an external Phase Locked Loop (PLL) used as a cleanup PLL with a High Speed Serial (HSS) link to calculate system overall peaking and stability for three PLLs chained. The frequency domain transfer function of PLLs is modeled using hardware data and the MATLAB RF Toolbox™. The transfer function of PLLs are then cascaded to calculate phase margin and gain margin using the MATLAB Control System Tool box. Time domain step response and jitter of the overall system are also evaluated using MATLAB/Simulink mixed signal tool box.
Biography:
About the presenter:
Don Pakbaz
is a
Principal Technical Staff Member (PTSM)
at GLOBALFOUNDRIES.
He has worked in IBM and GLOBALFOUNDRIES ASIC development division for 24 years. He is an adjunct professor at Vermont Technical College (VTC) where he teaches courses in Signal Integrity and Control System disciplines. His work experience includes Signal Integrity, Power Integrity and analog core design such as PLL and High Speed serial link.