ESD and Related Reliability Challenges for Advanced Semiconductor Technologies

#ESD, #Latch-up #Reliability
Share

In these uncertain times, the Northern Virginia/Washington Chapter of Electron Devices Society is unable to schedule in-person chapter events but is pleased to organize the following virtual meeting available to attend on line. Please note the lunch time schedule so that you can take a break from your work at home and have the evening free. Hope you are all staying safe.



  Date and Time

  Location

  Hosts

  Registration



  • Date: 08 Apr 2020
  • Time: 12:00 PM to 01:00 PM
  • All times are (GMT-05:00) US/Eastern
  • Add_To_Calendar_icon Add Event to Calendar
  • Online
  • Fairfax, Virginia
  • United States

  • Contact Event Host
  • Contact the host for WebEx call-in link before 4/7/2020.

    Tony GuoMurty Polavarapu



  Speakers

Dr. Charvaka Duvvury

Topic:

ESD and Related Reliability Challenges for Advanced Semiconductor Technologies

Abstract:  

Since the last four decades ESD has been receiving wide attention as an important and critical concern for electronic devices and systems. And it continues to be so because scaling of IC technologies for higher performance systems is making it even more challenging. Related to ESD is Latchup that always requires IC design focus to prevent damage and malfunction during applications. Although not directly correlated to ESD, Electrical Overstress (EOS) has been a constant source of damage during applications and is now being much more thoroughly addressed to understand the root causes and define methods for mitigation, especially in view of increased electronics for automotive applications. This seminar will outline the challenges for each of these aspects, present some damage examples for gaining lessons learned, and summarize industry approach for solutions to maintain overall reliability.

Biography:

Charvaka Duvvury was a Texas Instruments fellow while he worked in the Silicon Technology Development group at TI.  He received his PhD in engineering science from the University of Toledo and afterwards worked as a post-doctoral fellow in Physics at the University of Alberta. His experience at Texas Instruments spanned for 35 years in semiconductor device physics with pioneering development work in ESD design. He has also mentored PhD students at several leading US universities on their investigations in ESD research and received Outstanding Industry Mentor Award twice from the SRC. Charvaka has published over 150 papers in technical journals and conferences and holds more than 75 US patents. He co-authored and contributed to 5 books on the subject. He is a recipient of the IEEE Electron Devices Society’s Education Award and Outstanding Contributions Award from the EOS/ESD Symposium. Charvaka has been serving on Board of Directors of the ESD Association (ESDA) since 1997