Rashmi Jha of University of Cincinnati

Transition Metal Oxide (TMO) based Resistive Random Access Memory (ReRAM) devices have gathered significant research attention for low-energy embedded and standalone non-volatile memory applications in the recent years. These devices are projected to be highly scalable and can be easily integrated into the current Complementary Metal Oxide Semiconductor (CMOS) process-flow because of materials and process compatibility.  This talk will focus on discussing various types of TMO based ReRAM devices, device physics behind switching and charge transport in various resistive states, device performance, and pending challenges to be addressed to achieve the desired device targets. Role of doping in TMO and interface engineering in ReRAM stacks will be discussed towards addressing some of the challenges such as achieving a forming-free and self-current limiting ReRAM devices. Finally, applications of these devices in low-energy digital and hardware-enabled neuromorphic computing will be presented. 

Biography:

Dr. Rashmi Jha is an Associate Professor in Electrical Engineering and Computing Systems Department at the University of Cincinnati. She worked as an Assistant Professor and then Associate Professor in Electrical Engineering and Computer Science Department at the University of Toledo from 2008 to 2015. Before this, she worked as a Process Integration Engineer for 45 nm/32 nm High-k/Metal Gates based Advanced CMOS technologies at Semiconductor Research and Development Center, IBM, East Fishkill New York between 2006-2008. She finished her Ph.D. and M.S. in Electrical Engineering from North Carolina State University in 2006 and 2003, respectively, and B.Tech. in Electrical Engineering from Indian Institute of Technology (IIT) Kharagpur, India in 2000.

She has more than 13 years of experience in the areas of Solid State Electronic/Nanoelectronic Device Fabrication, Electrical Characterization, Data Analysis, and Device Modeling.  She has been granted 12 US patents and has authored/co-authored several publications in the areas of nanoelectronic devices. She has been a recipient of CAREER Award from the National Science Foundation (NSF) in 2013, IBM Faculty Award in 2012, IBM Invention Achievement Award in 2007, Materials Research Society's Graduate Student Award in 2006, Applied Materials Fellowship Award in 2005-2006, and the best student paper award nomination in IEEE International Electron Devices Meeting (IEDM) in 2005. She is the director of Emerging Devices for Advanced Computing Systems (EDACS) laboratory at the University of Cincinnati. Her current research interests lie in the areas of Ultra-Low Energy Nanoelectronic Devices Enabled Future Neuromorphic Computing Systems, Resistive Random Access Memory Devices, Spintronics, Emerging Nanoscale Devices Enabled Cyber-Security Systems, Logic and Memory Devices for Wearable Computing and IoT, and Energy Harvesting Devices.   

Address:Dept. of Electrical Engineering and Computing Systems, University of Cincinnati, Cincinnati, United States, 45221

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 Dinu Patel, IBM Retiree

 Topic: History of Semiconductor Memory and Manassas Fab

 The origin of semiconductor memory devices can be traced back to the early 1960s but what today is known as DRAM based on a single access transistor and a capacitor was invented by Robert Dennard at IBM in 1967.  This talk will juxtapose the DRAM history with that of the Manassas facility which has gone through several ownership changes over the last four decades. 

Biography:

Dinu Patel is currently retired with over four decades of experience in the semiconductor industry.  He was with Westinghouse in Baltimore, MD (now Northrop Grumman) before joining IBM.  At IBM, he has made significant contributions in the areas of process development and product engineering and has led large engineering teams at Essex Junction, VT, East Fishkill, NY, Raleigh, NC and Manassas, VA locations.  He joined Lockheed Martin (later BAE Systems), in Manassas, VA in 1991 and led engineering projects to develop radiation-hardened anti-fuse based Field Programmable Gate Arrays (FPGAs) and Programmable Read Only Memories (PROMs) for space applications.  He earned his M.S. degree in electrical engineering from North Carolina State University. Mr. Patel was a Senior Member of the IEEE and served the Northern Virginia/Washington Chapter of Electron Devices Society as Treasurer.

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John Zhang of Micron Technology 

Topic: Current Landscape of Semiconductor Memory Industry 

Biography: 

Dr. John Zhang has 16+ years of experience in semiconductor memory process R & D, Process Integration, New Technology Transfer and Yield Improvement in a high volume manufacturing Fab. He received his Ph.D. degree in Materials Science and Engineering from Clemson University, South Carolina in 2000. After graduation, he joined Micron Technology (Boise) Process R & D for Memory Process Technology development. In 2002, he moved to Micron Technology Virginia to help set up Micron’s first 300 mm pilot line Fab and transfer 200 mm DRAM process technology from R & D Fab to 300 mm volume production Fab in Virginia. Since 2002, he has been working in Process Integration group at Micron Technology Virginia to drive new technology transfer, yield improvement, device/process optimization, and cost reduction for multi-generation DRAM technology nodes. In addition to his experience in Semiconductor Memory, his expertise also includes High K Dielectric, Ferroelectric and Piezoelectric Materials/Devices. Dr. Zhang has been granted 3 US patents and has authored/coauthored 10+ technical papers in peer-reviewed journals. He has been a Senior Member of the IEEE -Electron Devices Society since 2009 and currently he is a chair of IEEE-EDS Northern Virginia/Washington DC Chapter.

Nadim Haddad  of Nanotechnology Council of Northern Virginia and Washington, DC

Space and Nuclear radiation has a major disruptive effect on electronic device operation and reliability, not only in space, but also for avionic and terrestrial applications. Single Event Effects (SEE) caused by a single charged particle presents a major challenge especially for scaled technologies. In this talk we will review operational environments, the effect of various radiation sources on device operation and reliability, and approaches to mitigate radiation effects. We will also discuss the effects of technology scaling, and unique mechanisms affecting scaled devices that were negligible in older technologies.

Biography:

Nadim F. Haddad received his B.A. in Physics and Mathematics in 1965 from Kansas Wesleyan University and his M.S. in Electrical Engineering in 1966 from Michigan State University. He joined IBM Components Division in East Fishkill, NY and became a manager of Yield Diagnostics, then transferred to the Federal Systems Division in Manassas, VA as a manager of Semiconductor Technology Development. He then rejoined the technical team as a Senior Technical Staff Member, and served as a principal investigator for the VLSI Independent Research and Development. Nadim was the lead engineer for the development of radiation hardened technology for the Very High Speed Integrated Circuit (VHSIC) Program, Radiation Hardened Microelectronics Program, among others; and was instrumental to the development of nine generations of radiation hardened technology and products at IBM, Loral, Lockheed Martin and BAE Systems. His approach capitalized on significant commercial investment in driving forward the development of radiation hardened technologies and products for space in support of military, civil and commercial applications. He retired in in 1997 from IBM and in 2012 from BAE Systems as a Technical Director and Engineering Fellow. He then served as a Term Professional Engineer with the Institute for Space and Defense Electronics (ISDE) at Vanderbilt University.

Nadim was an active participants in several technology forums including the IEEE Nuclear and Space Radiation Effects Conference (NSREC), Hardened Electronics and Radiation Technology (HEART), Government Microcircuit Applications and Critical Technology Conference (GOMACTech), IEEE International SOI Conference, Radiation and its Effects on Components and Systems (RADECS), and Single Event Effects Symposium (SEE) as an author/presenter, paper reviewer, short course instructor, session chair and technical program chair. He authored or co-authored over 100 publications and is credited with 26 inventions.

Nadim was recognize in 2012 as a Fellow/IEEE “for development of radiation hardened semiconductor device technology and products for space applications”. He is a member of IEEE/NPSS and EDS. Currently, he is serving as Chair, Nanotechnology Council of Northern Virginia and Washington, DC, as well as Director in the Northern Virginia Section of IEEE.

 He was also recognized in Marquis Who’s Who in America, Who’s Who in Science and Engineering and Who’s Who in the World.

Address:Nanotechnology Council of Northern Virginia and Washington, DC, , Fairfax, Virginia, United States