IEEE VNR VJIET DEPARTMENT OF ECE IN ASSOCIATION WITH IEEE CASS STUDENT CHAPTER OF VNRVJIET & IEEE CAS/EDS JOINT CHAPTER, HYDERABAD ORGANIZING ONE WEEK PROFESIONAL DEVELOPMENT PROGRAMME ON EXPLORING THE CUTTING-EDGE DEVELOPMENTS IN VLSI DESIGN

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IEEE VNR VJIET DEPARTMENT OF ECE  IN ASSOCIATION WITH IEEE CASS STUDENT CHAPTER OF VNRVJIET & IEEE CAS/EDS JOINT CHAPTER, HYDERABAD ORGANIZING ONE WEEK PROFESIONAL DEVELOPMENT PROGRAMME ON  EXPLORING THE CUTTING-EDGE DEVELOPMENTS IN VLSI DESIGN on 18th -22nd April 2024 from 10 AM to 4 PM.


IEEE VNR VJIET DEPARTMENT OF ECE  IN ASSOCIATION WITH IEEE CASS STUDENT CHAPTER OF VNRVJIET & IEEE CAS/EDS JOINT CHAPTER, HYDERABAD ORGANIZING ONE WEEK PROFESIONAL DEVELOPMENT PROGRAMME ON  EXPLORING THE CUTTING-EDGE DEVELOPMENTS IN VLSI DESIGN on 18th -22nd April 2024 from 10 AM to 4 PM.

 

Exploring the cutting-edge developments in Very Large Scale Integration (VLSI) design involves delving into the latest advancements and innovations in the field of semiconductor technology. VLSI design is crucial for creating integrated circuits (ICs) that are used in a wide range of electronic devices, from smartphones and laptops to complex systems like medical devices and automotive electronics. Some key areas of cutting-edge developments in VLSI design include:

  1. Advanced Process Technologies: With each new technology node (such as 7nm, 5nm, and beyond), there are significant improvements in transistor density, power efficiency, and performance. Techniques like FinFETs and Gate-All-Around (GAA) transistors are used to achieve these advancements.

  2. System-on-Chip (SoC) Integration: SoCs integrate multiple functions onto a single chip, including processors, memory, and peripherals. Advanced packaging technologies, such as 3D stacking and chiplets, are being used to increase integration density and reduce power consumption.

  3. Artificial Intelligence (AI) Hardware Acceleration: With the rise of AI applications, there's a growing need for specialized hardware accelerators, like GPUs, TPUs, and custom AI chips. VLSI design plays a crucial role in optimizing these accelerators for performance and power efficiency.



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  • Start time: 18 Mar 2024 10:00 AM
  • End time: 22 Apr 2024 04:00 PM
  • All times are (UTC+05:30) Chennai
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  • Contact Event Hosts
  • Dr. P. kishore | Faculty Coordinator | kishore_p@vnrvjiet.in 







IEEE VNR VJIET DEPARTMENT OF ECE  IN ASSOCIATION WITH IEEE CASS STUDENT CHAPTER OF VNRVJIET & IEEE CAS/EDS JOINT CHAPTER, HYDERABAD ORGANIZING ONE WEEK PROFESIONAL DEVELOPMENT PROGRAMME ON  EXPLORING THE CUTTING-EDGE DEVELOPMENTS IN VLSI DESIGN on 18th -22nd April 2024 from 10 AM to 4 PM.