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VERSION:2.0
PRODID:IEEE vTools.Events//EN
CALSCALE:GREGORIAN
BEGIN:VTIMEZONE
TZID:Canada/Atlantic
BEGIN:DAYLIGHT
DTSTART:20150308T030000
TZOFFSETFROM:-0400
TZOFFSETTO:-0300
RRULE:FREQ=YEARLY;BYDAY=2SU;BYMONTH=3
TZNAME:ADT
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BEGIN:STANDARD
DTSTART:20151101T010000
TZOFFSETFROM:-0300
TZOFFSETTO:-0400
RRULE:FREQ=YEARLY;BYDAY=1SU;BYMONTH=11
TZNAME:AST
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BEGIN:VEVENT
DTSTAMP:20151209T180700Z
UID:F1E72EA3-E5B6-11E7-833E-0050568D7F66
DTSTART;TZID=Canada/Atlantic:20150807T093000
DTEND;TZID=Canada/Atlantic:20150807T110000
DESCRIPTION:With the increasing demands for higher signal speeds coupled wi
 th the need for decreasing feature sizes\, signal integrity effects such a
 s delay\, distortion\, reflections\, crosstalk\, ground bounce and electro
 magnetic interference have become the dominant factors limiting the perfor
 mance of high-speed systems. These effects can be diverse and can seriousl
 y impact the design performance at all hierarchical levels including integ
 rated circuits\, printed circuit boards\, multi-chip modules and backplane
 s. If not considered during the design stage\, signal integrity effects ca
 n cause failed designs. Since extra iterations in the design cycle are cos
 tly\, accurate prediction of these effects is a necessity in high-speed de
 signs. Consequently\, preserving signal integrity has become one of the mo
 st challenging tasks facing designers of modern multifunction and miniatur
 e electronic circuits and systems. This talk provides a comprehensive appr
 oach for understanding the multidisciplinary problem of signal integrity: 
 issues/modeling/analysis in high-speed designs.\n\nHalifax\, Nova Scotia\,
  Canada
LOCATION:Halifax\, Nova Scotia\, Canada
ORGANIZER:
SEQUENCE:0
SUMMARY:[Legacy Report] Demystifying Signal Integrity in High-Speed Designs
URL;VALUE=URI:https://events.vtools.ieee.org/m/123517
X-ALT-DESC:Description: &lt;br /&gt;&lt;p&gt;With the increasing demands for higher sig
 nal speeds coupled with the need for decreasing feature sizes\, signal int
 egrity effects such as delay\, distortion\, reflections\, crosstalk\, grou
 nd bounce and electromagnetic interference have become the dominant factor
 s limiting the performance of high-speed systems. These effects can be div
 erse and can seriously impact the design performance at all hierarchical l
 evels including integrated circuits\, printed circuit boards\, multi-chip 
 modules and backplanes. If not considered during the design stage\, signal
  integrity effects can cause failed designs. Since extra iterations in the
  design cycle are costly\, accurate prediction of these effects is a neces
 sity in high-speed designs. Consequently\, preserving signal integrity has
  become one of the most challenging tasks facing designers of modern multi
 function and miniature electronic circuits and systems. This talk provides
  a comprehensive approach for understanding the multidisciplinary problem 
 of signal integrity: issues/modeling/analysis in high-speed designs.&lt;/p&gt;
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