BEGIN:VCALENDAR
VERSION:2.0
PRODID:IEEE vTools.Events//EN
CALSCALE:GREGORIAN
BEGIN:VTIMEZONE
TZID:Asia/Kolkata
BEGIN:STANDARD
DTSTART:19451014T230000
TZOFFSETFROM:+0630
TZOFFSETTO:+0530
TZNAME:IST
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20170210T144017Z
UID:F385A535-E5B6-11E7-833E-0050568D7F66
DTSTART;TZID=Asia/Kolkata:20170117T103000
DTEND;TZID=Asia/Kolkata:20170119T162000
DESCRIPTION:Introduction:\n\nThe Department of ECE in collaboration with Co
 mmunications Society under IEEE – VBIT SB took an initiative to organize
  a three day hands - on workshop on “Image Processing using MATLAB\, Sim
 ulink and FPGA” for both faculty and students.\n\nEvent Description:\n\n
 The objective of this workshop was to focus on new trends\, techniques\, d
 eveloping skills and innovative ideas of image processing. It is intended 
 to guide the young engineers and faculty members to inculcate the skills o
 f applying the existing tools to serve the real time complications. VLSI t
 ools help the society and country in developing innovative products in ima
 ge processing and biomedical applications. This workshop aimed at making t
 he participants aware of existing tools\, the methodologies involved in it
  and how to relate them to the practical world.\n\nDay 1:\n\n The comme
 ncement of the workshop was done with a brief on introduction to VLSI\, it
 s importance and the real time operations.\n\n The difference between A
 nalog and Digital systems – their relation with Signal Processing was st
 ated to the participants.\n\n Basic Mathematical computations\, Algorit
 hmic development in MATLAB and Simulink were taught.\n\n Next level of 
 examination of academic level was introduced by letting the participants s
 olve various examples.\n\nDay 2:\n\n Image Processing using MATLAB is i
 ntroduced in the first session which seemed to be intriguing as it is out 
 of regular curriculum.\n\n The stages of processing an image and perfor
 ming desired operations on it were illustrated.\n\n In the next session
  the difference between MATLAB and Simulink was elucidated and frequently 
 used tools in Simulink were detailed.\n\n Performing of same operations
  on an image using Simulink was taught which reduced the stress of coding 
 in MATLAB.\n\n The chronological order of linking Simulink to FPGA was 
 explained in detail.\n\n Various examples like generation of sine wave\
 , FDA\, BPSK were done by the participants under the guidance of the speak
 er.\n\n Difference between various MATLAB versions was briefed about.\n
 \nDay 3:\n\n The procedure to simulate and synthesis a program in Xilin
 x was depicted by taking intelligible examples.\n\n Sequence of interfa
 cing the program with FPGA was clearly illustrated in an interesting way.\
 n\n SPARTAN – 3 and SPARTAN – 6 boards were utilized for processing
  purpose and the components on it were detailed.\n\n Step by step proce
 dure of interfacing with SPARTAN - 6 was demonstrated.\n\n A demo on in
 terfacing and Video Processing was shown which cleared all the doubts pres
 ent in the minds of participants.\n\nReview:\n\nExuberant knowledge was ga
 ined by the participants because of hands – on experience with the tools
  used in the high level software. The workshop offered a giant opportunity
  to witness the eminent speaker\, sharing knowledge with the young and asp
 iring minds. It encouraged the participants to choose a field among all th
 e present technological developments and come up with new ideas. The ambig
 uous minds of under graduates were satisfied by the empirical study.\n\nHy
 derabad\, Andhra Pradesh\, India
LOCATION:Hyderabad\, Andhra Pradesh\, India
ORGANIZER:sahithireddybolla@gmail.com
SEQUENCE:0
SUMMARY:[Legacy Report] IMAGE PROCESSING WORKSHOP
URL;VALUE=URI:https://events.vtools.ieee.org/m/144884
X-ALT-DESC:Description: &lt;br /&gt;&lt;p&gt;&lt;span style=&quot;font-size: 12pt\;&quot;&gt;&lt;strong&gt;&lt;s
 pan style=&quot;font-family: verdana\, geneva\;&quot;&gt;Introduction: &lt;/span&gt;&lt;/strong&gt;
 &lt;/span&gt;&lt;/p&gt;\n&lt;p&gt;&lt;span style=&quot;font-family: verdana\, geneva\; font-size: 10
 pt\;&quot;&gt;The Department of ECE in collaboration with Communications Society u
 nder IEEE &amp;ndash\; VBIT SB took an initiative to organize a three day hand
 s - on workshop on &amp;ldquo\;Image Processing using MATLAB\, Simulink and FP
 GA&amp;rdquo\; for both faculty and students.&lt;/span&gt;&lt;/p&gt;\n&lt;p&gt;&lt;span style=&quot;font
 -size: 12pt\;&quot;&gt;&lt;strong&gt;&lt;span style=&quot;font-family: verdana\, geneva\;&quot;&gt;Event
  Description:&lt;/span&gt;&lt;/strong&gt;&lt;/span&gt;&lt;/p&gt;\n&lt;p&gt;&lt;span style=&quot;font-family: ver
 dana\, geneva\; font-size: 10pt\;&quot;&gt;The objective of this workshop was to f
 ocus on new trends\, techniques\, developing skills and innovative ideas o
 f image processing. It is intended to guide the young engineers and facult
 y members to inculcate the skills of applying the existing tools to serve 
 the real time complications. VLSI tools help the society and country in de
 veloping innovative products in image processing and biomedical applicatio
 ns. This workshop aimed at making the participants aware of existing tools
 \, the methodologies involved in it and how to relate them to the practica
 l world.&lt;/span&gt;&lt;/p&gt;\n&lt;p&gt;&lt;strong&gt;&lt;span style=&quot;font-family: verdana\, geneva
 \; font-size: 10pt\;&quot;&gt;Day 1:&lt;/span&gt;&lt;/strong&gt;&lt;/p&gt;\n&lt;p&gt;&lt;span style=&quot;font-fam
 ily: verdana\, geneva\; font-size: 10pt\;&quot;&gt; The commencement of the wor
 kshop was done with a brief on introduction to VLSI\, its importance and t
 he real time operations.&lt;/span&gt;&lt;/p&gt;\n&lt;p&gt;&lt;span style=&quot;font-family: verdana\
 , geneva\; font-size: 10pt\;&quot;&gt; The difference between Analog and Digita
 l systems &amp;ndash\; their relation with Signal Processing was stated to the
  participants.&lt;/span&gt;&lt;/p&gt;\n&lt;p&gt;&lt;span style=&quot;font-family: verdana\, geneva\;
  font-size: 10pt\;&quot;&gt; Basic Mathematical computations\, Algorithmic deve
 lopment in MATLAB and Simulink were taught.&lt;/span&gt;&lt;/p&gt;\n&lt;p&gt;&lt;span style=&quot;fo
 nt-family: verdana\, geneva\; font-size: 10pt\;&quot;&gt; Next level of examina
 tion of academic level was introduced by letting the participants solve va
 rious examples.&lt;/span&gt;&lt;/p&gt;\n&lt;p&gt;&lt;strong&gt;&lt;span style=&quot;font-family: verdana\,
  geneva\; font-size: 10pt\;&quot;&gt;Day 2:&lt;/span&gt;&lt;/strong&gt;&lt;/p&gt;\n&lt;p&gt;&lt;span style=&quot;f
 ont-family: verdana\, geneva\; font-size: 10pt\;&quot;&gt; Image Processing usi
 ng MATLAB is introduced in the first session which seemed to be intriguing
  as it is out of regular curriculum.&lt;/span&gt;&lt;/p&gt;\n&lt;p&gt;&lt;span style=&quot;font-fami
 ly: verdana\, geneva\; font-size: 10pt\;&quot;&gt; The stages of processing an 
 image and performing desired operations on it were illustrated.&lt;/span&gt;&lt;/p&gt;
 \n&lt;p&gt;&lt;span style=&quot;font-family: verdana\, geneva\; font-size: 10pt\;&quot;&gt; I
 n the next session the difference between MATLAB and Simulink was elucidat
 ed and frequently used tools in Simulink were detailed.&lt;/span&gt;&lt;/p&gt;\n&lt;p&gt;&lt;sp
 an style=&quot;font-family: verdana\, geneva\; font-size: 10pt\;&quot;&gt; Performin
 g of same operations on an image using Simulink was taught which reduced t
 he stress of coding in MATLAB.&lt;/span&gt;&lt;/p&gt;\n&lt;p&gt;&lt;span style=&quot;font-family: ve
 rdana\, geneva\; font-size: 10pt\;&quot;&gt; The chronological order of linking
  Simulink to FPGA was explained in detail.&lt;/span&gt;&lt;/p&gt;\n&lt;p&gt;&lt;span style=&quot;fon
 t-family: verdana\, geneva\; font-size: 10pt\;&quot;&gt; Various examples like 
 generation of sine wave\, FDA\, BPSK were done by the participants under t
 he guidance of the speaker.&lt;/span&gt;&lt;/p&gt;\n&lt;p&gt;&lt;span style=&quot;font-family: verda
 na\, geneva\; font-size: 10pt\;&quot;&gt; Difference between various MATLAB ver
 sions was briefed about.&lt;/span&gt;&lt;/p&gt;\n&lt;p&gt;&lt;strong&gt;&lt;span style=&quot;font-family: 
 verdana\, geneva\; font-size: 10pt\;&quot;&gt;Day 3:&lt;/span&gt;&lt;/strong&gt;&lt;/p&gt;\n&lt;p&gt;&lt;span
  style=&quot;font-family: verdana\, geneva\; font-size: 10pt\;&quot;&gt; The procedu
 re to simulate and synthesis a program in Xilinx was depicted by taking in
 telligible examples.&lt;/span&gt;&lt;/p&gt;\n&lt;p&gt;&lt;span style=&quot;font-family: verdana\, ge
 neva\; font-size: 10pt\;&quot;&gt; Sequence of interfacing the program with FPG
 A was clearly illustrated in an interesting way.&lt;/span&gt;&lt;/p&gt;\n&lt;p&gt;&lt;span styl
 e=&quot;font-family: verdana\, geneva\; font-size: 10pt\;&quot;&gt; SPARTAN &amp;ndash\;
  3 and SPARTAN &amp;ndash\; 6 boards were utilized for processing purpose and 
 the components on it were detailed.&lt;/span&gt;&lt;/p&gt;\n&lt;p&gt;&lt;span style=&quot;font-famil
 y: verdana\, geneva\; font-size: 10pt\;&quot;&gt; Step by step procedure of int
 erfacing with SPARTAN - 6 was demonstrated.&lt;/span&gt;&lt;/p&gt;\n&lt;p&gt;&lt;span style=&quot;fo
 nt-family: verdana\, geneva\; font-size: 10pt\;&quot;&gt; A demo on interfacing
  and Video Processing was shown which cleared all the doubts present in th
 e minds of participants.&lt;/span&gt;&lt;/p&gt;\n&lt;p&gt;&lt;span style=&quot;font-size: 12pt\;&quot;&gt;&lt;s
 trong&gt;&lt;span style=&quot;font-family: verdana\, geneva\;&quot;&gt;Review:&lt;/span&gt;&lt;/strong
 &gt;&lt;/span&gt;&lt;/p&gt;\n&lt;p&gt;&lt;span style=&quot;font-family: verdana\, geneva\; font-size: 1
 0pt\;&quot;&gt;Exuberant knowledge was gained by the participants because of hands
  &amp;ndash\; on experience with the tools used in the high level software. Th
 e workshop offered a giant opportunity to witness the eminent speaker\, sh
 aring knowledge with the young and aspiring minds. It encouraged the parti
 cipants to choose a field among all the present technological developments
  and come up with new ideas. The ambiguous minds of under graduates were s
 atisfied by the empirical study.&lt;/span&gt;&lt;/p&gt;\n&lt;p&gt;&amp;nbsp\;&lt;/p&gt;
END:VEVENT
END:VCALENDAR