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PRODID:IEEE vTools.Events//EN
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TZID:Asia/Calcutta
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DTSTART:19451014T230000
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BEGIN:VEVENT
DTSTAMP:20121204T113024Z
UID:2D55A094-8F56-1030-AD29-0050568D3657
DTSTART;TZID=Asia/Calcutta:20121031T160000
DTEND;TZID=Asia/Calcutta:20121031T170000
DESCRIPTION:Title: Edge effects in graphene nanoribbon MOSFETs: an atomisti
 c simulation study Abstract Shrinking device sizes and shift towards lower
  power logic devices have driven the semiconductor research community to e
 xplore newer materials and highly confined architectures. Evaluation of su
 ch device proposals often requires first-principles simulationsof the unde
 rlying physics. To this end\, I will briefly delineate the development of 
 a fully three dimensional atomistic quantum transport simulator within a n
 earest-neighbor tight-binding framework. I will show how band-to-band tunn
 eling increases the leakage current in OFF state in field-effect transisto
 rs (FETs)of low band gap semiconductors such as InSb. I will move on to gr
 aphene nanoribbon (GNR) FETs\, which are attractive for a wide variety of 
 reasons. However\, for logic devices\, to maintain a high ON/OFF ratio\, e
 xtremely narrow ribbons are often proposed to open up band gaps in otherwi
 se gapless graphene monolayers. Using the above simulator\, I will illustr
 ate that while band gap does increase as GNR width is decreased\, in pract
 icedevices relying on that might show extreme sensitivity to ribbon-edge r
 oughness\,leading to performance degradation and device-to-device variabil
 ity. Brief biography Dipanjan Basur eceived his B.E. degree in Electronics
  and Telecomm. from Jadavpur University in 2001\, M.Tech. from EE departme
 nt\, IIT Kanpur in 2005\, and Ph.D. from ECE dept. of Univ. of Texas at Au
 stin in 2010. During his Ph. D. he worked on various quantum simulation me
 thods- for transport in confined structures\, as well as bulk electronic s
 tructure calculations. He focused on graphene as a channel material for lo
 gic applications. Under Prof. Allan H. MacDonald's guidance\, he explorede
 lectron-hole condensation between two graphene monolayers separated by thi
 n dielectric\, in the limit of weak as well as strong interlayer bare tunn
 eling\, all within Hartree-Fock theory. Since 2010\, he is with Intel Corp
 oration\, where he evaluates various short channel effects and benchmarks 
 performance of InGaAs and Ge MOSFETs. His broad research interests encompa
 ss modeling of solid-state electronic devices. Outside of work\, he enjoys
  reading\, traveling and photography.\n\nCo-sponsored by: Dr. Kumar Vaibha
 v Srivastava\n\nSpeaker(s): \, \, \, \n\nRoom: DA 229\, Bldg: ACES\, Depar
 tment of Electrical Engineering\, Indian Institute of Technology Kanpur\, 
 Kanpur\, Uttar Pradesh\, India\, 208016
LOCATION:Room: DA 229\, Bldg: ACES\, Department of Electrical Engineering\,
  Indian Institute of Technology Kanpur\, Kanpur\, Uttar Pradesh\, India\, 
 208016
ORGANIZER:kvs@iitk.ac.in
SEQUENCE:0
SUMMARY:Edge effects in graphene nanoribbon MOSFETs: an atomistic simulatio
 n study
URL;VALUE=URI:https://events.vtools.ieee.org/m/15629
X-ALT-DESC:Description: <br />Title: Edge effects in graphene nanoribbon MO
 SFETs: an atomistic simulation study\n\n \n\nAbstract\n\nShrinking device 
 sizes and shift towards lower power logic devices have driven the semicond
 uctor research community to explore newer materials and highly confined ar
 chitectures. Evaluation of such device proposals often requires first-prin
 ciples simulationsof the underlying physics. To this end\, I will briefly 
 delineate the development of a fully three dimensional atomistic quantum t
 ransport simulator within a nearest-neighbor tight-binding framework. I wi
 ll show how band-to-band tunneling increases the leakage current in OFF st
 ate in field-effect transistors (FETs)of low band gap semiconductors such 
 as InSb.\n\nI will move on to graphene nanoribbon (GNR) FETs\, which are a
 ttractive for a wide variety of reasons. However\, for logic devices\, to 
 maintain a high ON/OFF ratio\, extremely narrow ribbons are often proposed
  to open up band gaps in otherwise gapless graphene monolayers. Using the 
 above simulator\, I will illustrate that while band gap does increase as G
 NR width is decreased\, in practicedevices relying on that might show extr
 eme sensitivity to ribbon-edge roughness\,leading to performance degradati
 on and device-to-device variability.\n\n \n\nBrief biography\n\nDipanjan B
 asur eceived his B.E. degree in Electronics and Telecomm. from Jadavpur Un
 iversity in 2001\, M.Tech. from EE department\, IIT Kanpur in 2005\, and P
 h.D. from ECE dept. of Univ. of Texas at Austin in 2010. During his Ph. D.
  he worked on various quantum simulation methods- for transport in confine
 d structures\, as well as bulk electronic structure calculations. He focus
 ed on graphene as a channel material for logic applications. Under Prof. A
 llan H. MacDonald's guidance\, he exploredelectron-hole condensation betwe
 en two graphene monolayers separated by thin dielectric\, in the limit of 
 weak as well as strong interlayer bare tunneling\, all within Hartree-Fock
  theory. Since 2010\, he is with Intel Corporation\, where he evaluates va
 rious short channel effects and benchmarks performance of InGaAs and Ge MO
 SFETs. His broad research interests encompass modeling of solid-state elec
 tronic devices. Outside of work\, he enjoys reading\, traveling and photog
 raphy.
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