BEGIN:VCALENDAR VERSION:2.0 PRODID:IEEE vTools.Events//EN CALSCALE:GREGORIAN BEGIN:VTIMEZONE TZID:America/New_York BEGIN:DAYLIGHT DTSTART:20180311T030000 TZOFFSETFROM:-0500 TZOFFSETTO:-0400 RRULE:FREQ=YEARLY;BYDAY=2SU;BYMONTH=3 TZNAME:EDT END:DAYLIGHT BEGIN:STANDARD DTSTART:20181104T010000 TZOFFSETFROM:-0400 TZOFFSETTO:-0500 RRULE:FREQ=YEARLY;BYDAY=1SU;BYMONTH=11 TZNAME:EST END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20180503T000000Z UID:DC0A4AF1-64FF-4E17-A511-E4D343EBF647 DTSTART;TZID=America/New_York:20180329T110000 DTEND;TZID=America/New_York:20180329T121500 DESCRIPTION:The Long Island (LI) Chapter of IEEE Signal Processing Society (SPS) in collaboration with the Educational Activities Committee of IEEE L I\; Renewable Energy and Sustainability Center at Farmingdale State Colleg e and IEEE LI Women in Engineering Affinity Group Presents the following L ecture:\n\nFrom Top Level Design Specifications to Detail Design\n\nThis d iscussion will focus on the process of breaking down top level system spec ifications into detail design requirements that an individual designer can address. It will talk about the systematic decomposition and allocation p rocesses\, from top-level requirements decomposition\, to functional ident ification and allocation\, to functional decomposition and finally to the physical allocation to a design entity… be it for microwave\, analog\, d igital\, or signal processing hardware\, or FPGA or embedded processor cod e. It will use the introduction of Direct Digital Synthesizers into histor ically analog equipment as an example of the process. This discussion is a ppropriate for both practitioners as well as undergraduate Engineering stu dents.\n\nSpeaker(s): Ed Palacio\, Bob Lukachinski\n\nRoom: Room 247\, Bld g: Lupton Hall\, Farmingdale State College\, 2350 Broadhollow Road\, Farmi ngdale\, New York\, United States\, 11735 LOCATION:Room: Room 247\, Bldg: Lupton Hall\, Farmingdale State College\, 2 350 Broadhollow Road\, Farmingdale\, New York\, United States\, 11735 ORGANIZER:signal@ieee.li SEQUENCE:3 SUMMARY:From Top Level Design Specifications to Detail Design URL;VALUE=URI:https://events.vtools.ieee.org/m/169276 X-ALT-DESC:Description: <br /><p>The Long Island (LI) Chapter of IEEE Signa l Processing Society (SPS) in collaboration with the Educational Activitie s Committee of IEEE LI\; Renewable Energy and Sustainability Center at Far mingdale State College and IEEE LI Women in Engineering Affinity Group Pre sents the following Lecture:</p>\n<p><strong>From Top Level Design Specifi cations to Detail Design</strong></p>\n<p>This discussion will focus on th e process of breaking down top level system&nbsp\;specifications into deta il design requirements that an individual designer can address.&nbsp\;It w ill talk about the systematic decomposition and allocation processes\, fro m top-level&nbsp\;requirements decomposition\, to functional identificatio n and allocation\, to functional&nbsp\;decomposition and finally to the ph ysical allocation to a design entity&hellip\; be it for&nbsp\;microwave\, analog\, digital\, or signal processing hardware\, or FPGA or embedded&nbs p\;processor code. It will use the introduction of Direct Digital Synthesi zers into&nbsp\;historically analog equipment as an example of the process . This discussion is&nbsp\;appropriate for both practitioners as well as u ndergraduate Engineering students.&nbsp\;</p> END:VEVENT END:VCALENDAR