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DTSTART:20180311T030000
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DESCRIPTION:IEEE Circuits and Systems Society-Silicon Valley (CAS-SV) Artif
 icial Intelligent For Industry Forum\n\nTopic: Algorithm-architecture co-d
 esign for energy-efficient deep learning\, including algorithm optimizatio
 n (e.g.\, novel numerical representation\, network pruning/compression) an
 d accelerator architectures (e.g.\, programmable SoC).\n\nSpeakers:\n\n(1)
  Dr. Pradeep Dubey from Parallel Computing Lab\, Intel Labs\, Intel Corpor
 ation (IEEE Fellow and Intel Fellow)\n\n(2) Prof. Vivienne Sze from MIT\, 
 Associate Professor of Electrical Engineering and Computer Science\, Elect
 rical Engineering and Computer Science\, (http://www.rle.mit.edu/people/di
 rectory/vivienne-sze/)\n\n(3) Prof. Yung-Hsiang Lu from Purdue University\
 , Professor in the School of Electrical and Computer Engineering (ACM dist
 inguished speaker) (https://engineering.purdue.edu/ECE/People/ptProfile?re
 source_id=3355&amp;group_id=2571)\n\n(4) Dr. Mark Sandler\, Google\n\nTitle: M
 obileNet: designing efficient architectures for mobile classification\, de
 tection and segmentation.\n\nAbstract: In this talk we present lessons and
  insights that led us to design of MobileNet V1 and V2\, discuss\n\ncommon
  optimization techniques\, such as quantization\, and common pitfalls when
  designing\n\nefficient architectures as well show our insights can guide 
 automated architecture search.\n\nBio: Mark Sandler is a research scientis
 t at Google\, working among other things\,\n\non next generation high perf
 ormance neural networks for mobile vision.\n\nHost:\n\nIEEE Circuits and S
 ystems Society and Intel Corporation\n\nCo-Host: IEEE Circuits and Systems
  Society Santa Clara Valley Chapter\, IEEE Signal Processing Society Santa
  Clara Valley Chapter\, and IEEE Computer Society Technical Committee on M
 ultimedia Computing\n\nCo-sponsored by: IEEE CAS Society\, IEEE Signal Pro
 cessing Society Chapter (Santa Clara Valley)\n\nSpeaker(s): Dr. Pradeep Du
 bey\, Prof. Vivienne Sze\n\nBldg: SC12 auditorium\, Intel Santa Clara \, 3
 600 Juliette Ln\, Santa Clara\, California\, United States\, 95054
LOCATION:Bldg: SC12 auditorium\, Intel Santa Clara \, 3600 Juliette Ln\, Sa
 nta Clara\, California\, United States\, 95054
ORGANIZER:imran.bashir@ieee.org
SEQUENCE:1
SUMMARY:IEEE CASS-SV Artificial Intelligent For Industry Forum
URL;VALUE=URI:https://events.vtools.ieee.org/m/176123
X-ALT-DESC:Description: &lt;br /&gt;&lt;p&gt;&lt;strong&gt;IEEE Circuits and Systems Society-
 Silicon Valley (CAS-SV) Artificial Intelligent For Industry Forum&lt;/strong&gt;
 &lt;/p&gt;\n&lt;p&gt;Topic: Algorithm-architecture co-design for energy-efficient deep
  learning\, including algorithm optimization (e.g.\, novel numerical repre
 sentation\, network pruning/compression) and accelerator architectures (e.
 g.\, programmable SoC).&lt;/p&gt;\n&lt;p&gt;Speakers:&lt;/p&gt;\n&lt;p&gt;(1)&amp;nbsp\;Dr. Pradeep Du
 bey from Parallel Computing Lab\, Intel Labs\, Intel Corporation (IEEE Fel
 low and Intel Fellow)&lt;/p&gt;\n&lt;p&gt;(2) Prof. Vivienne Sze from MIT\, Associate 
 Professor of Electrical Engineering and Computer Science\, Electrical Engi
 neering and Computer Science\, (&lt;a href=&quot;http://www.rle.mit.edu/people/dir
 ectory/vivienne-sze/&quot;&gt;http://www.rle.mit.edu/people/directory/vivienne-sze
 /&lt;/a&gt;)&lt;/p&gt;\n&lt;p&gt;(3)&amp;nbsp\;Prof. Yung-Hsiang Lu from Purdue University\, Pro
 fessor in the School of Electrical and Computer Engineering (ACM distingui
 shed speaker) (&lt;a href=&quot;https://engineering.purdue.edu/ECE/People/ptProfil
 e?resource_id=3355&amp;amp\;group_id=2571&quot;&gt;https://engineering.purdue.edu/ECE/
 People/ptProfile?resource_id=3355&amp;amp\;group_id=2571&lt;/a&gt;)&lt;/p&gt;\n&lt;p&gt;(4)&amp;nbsp
 \;Dr. Mark Sandler\, Google&lt;/p&gt;\n&lt;p&gt;Title: MobileNet: designing efficient 
 architectures for mobile classification\, detection and segmentation.&lt;/p&gt;\
 n&lt;p&gt;Abstract: In this talk we present lessons and insights that led us to 
 design of MobileNet V1 and V2\, discuss&lt;/p&gt;\n&lt;p&gt;common optimization techni
 ques\, such as quantization\, and common pitfalls when designing&lt;/p&gt;\n&lt;p&gt;e
 fficient architectures as well show our insights can guide automated archi
 tecture search.&lt;/p&gt;\n&lt;p&gt;Bio: Mark Sandler is a research scientist at Googl
 e\, working among other things\,&lt;/p&gt;\n&lt;p&gt;on next generation high performan
 ce neural networks for mobile vision.&lt;/p&gt;\n&lt;p&gt;Host:&lt;/p&gt;\n&lt;p&gt;IEEE Circuits 
 and Systems Society and Intel Corporation&lt;/p&gt;\n&lt;p&gt;Co-Host: IEEE Circuits a
 nd Systems Society Santa Clara Valley Chapter\, IEEE Signal Processing Soc
 iety Santa Clara Valley Chapter\, and IEEE Computer Society Technical Comm
 ittee on Multimedia Computing&lt;/p&gt;
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