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DTSTART:20190331T030000
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DTSTART:20181028T020000
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BEGIN:VEVENT
DTSTAMP:20181216T210628Z
UID:6C000CA5-0FA6-4768-BDC4-7BB034F8AB12
DTSTART;TZID=Europe/Zurich:20181210T111500
DTEND;TZID=Europe/Zurich:20181210T121500
DESCRIPTION:The next generation of computing platforms increases proximity 
 to the source of information rather than to humans\, allowing much more ag
 gressive miniaturization. The key technology for miniaturization had been 
 process scaling\, which had reduced the silicon area\, increased computati
 onal capability and lowered power consumption. However\, the latest deep-s
 ubmicron technologies do not fit well with mm-scale computing because of t
 he increased leakage current. Therefore\, advances in circuit level techni
 ques are critical to realizing networks of mm-scale IoT computing platform
 s. Consequently\, promising research outcomes have been published in vario
 us areas of medical care\, environmental monitoring and surveillance. Such
  wireless sensor nodes require new circuit techniques as they are placed i
 n a very distinct operating environment with specialized purposes compared
  to conventional applications. Ultra-low power consumption is one of the m
 ost challenging constraints resulting from the form factor of the system.\
 n\nThis talk\, based on recent publications\, introduces circuit technique
 s for the key building blocks of a miniaturized sensor node such as an ult
 ra-low power timers\, energy efficient sensor front-ends\, wireless power 
 transfer circuits and a reconfigurable frequency synthesizer.\n\nSpeaker(s
 ):  Prof. Dr.  Taekwang Jang \, \n\nRoom: MED0 1418 \, Bldg: MED - Auditoi
 r Adrien Palaz\, Ecole Polytechnique Fédérale de lausanne\, Batiment MED
 \, Lausanne\, Switzerland\, Switzerland\, CH-1015
LOCATION:Room: MED0 1418 \, Bldg: MED - Auditoir Adrien Palaz\, Ecole Polyt
 echnique Fédérale de lausanne\, Batiment MED\, Lausanne\, Switzerland\, 
 Switzerland\, CH-1015
ORGANIZER:mathieu.coustans@epfl.ch
SEQUENCE:3
SUMMARY:IEEE SSC EPFL Seminar : Ultra low power circuit designs for miniatu
 rized systems
URL;VALUE=URI:https://events.vtools.ieee.org/m/183206
X-ALT-DESC:Description: <br /><p>The next generation of computing platforms
  increases proximity to the source of information rather than to humans\, 
 &nbsp\;allowing much more aggressive miniaturization. The key technology f
 or miniaturization had been process scaling\, which had reduced the silico
 n area\, increased computational capability and lowered power consumption.
  However\, the latest deep-submicron technologies do not fit well with mm-
 scale computing because of the increased leakage current. Therefore\, adva
 nces in circuit level techniques are critical to realizing networks of mm-
 scale IoT computing platforms. Consequently\, promising research outcomes 
 have been published in various areas of medical care\, environmental monit
 oring and surveillance. Such wireless sensor nodes require new circuit tec
 hniques as they are placed in a very distinct operating environment with s
 pecialized purposes compared to conventional applications. Ultra-low power
  consumption is one of the most challenging constraints resulting from the
  form factor of the system.</p>\n<p>This talk\, based on recent publicatio
 ns\, introduces circuit techniques for the key building blocks of a miniat
 urized sensor node such as an ultra-low power timers\, energy efficient se
 nsor front-ends\, wireless power transfer circuits and a reconfigurable fr
 equency synthesizer.</p>
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