BEGIN:VCALENDAR
VERSION:2.0
PRODID:IEEE vTools.Events//EN
CALSCALE:GREGORIAN
BEGIN:VTIMEZONE
TZID:US/Eastern
BEGIN:DAYLIGHT
DTSTART:20180311T030000
TZOFFSETFROM:-0500
TZOFFSETTO:-0400
RRULE:FREQ=YEARLY;BYDAY=2SU;BYMONTH=3
TZNAME:EDT
END:DAYLIGHT
BEGIN:STANDARD
DTSTART:20181104T010000
TZOFFSETFROM:-0400
TZOFFSETTO:-0500
RRULE:FREQ=YEARLY;BYDAY=1SU;BYMONTH=11
TZNAME:EST
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20190107T164608Z
UID:A7917B98-4C2D-427E-84B5-CA6F3D1E1DE8
DTSTART;TZID=US/Eastern:20180608T103000
DTEND;TZID=US/Eastern:20180608T113000
DESCRIPTION:Title: Should RFIC Designers Care About Quantum Computing?\n\nA
 bstract: This talk will briefly introduce few of the basic concepts of qua
 ntum\ncomputing and focus on some aspects of the control systems required 
 to manipulate\nand read-out quantum states of specific types of qubits. Th
 e talk will then try to\naddress why and how mixed-signal and RFIC design 
 combined with large scale\nintegration has the potential of accelerating t
 he implementation of a fault-tolerant\nscalable quantum computer.\n\nSpeak
 er Biography: Stefano is a principal engineer at Intel Labs\, leading the 
 Next\nGeneration Radio Integration Lab. He drives several research activit
 ies focused at\nenabling radio circuit integration in deeply-scaled CMOS t
 echnologies.\nSince joining Intel Labs in 2004\, Stefano worked on MIMO tr
 ansceivers for WiFi\, digital PLLs\, high-efficient\ndigital architectures
  for polar and outphasing transmitters\, mm-wave radio transceiver and pha
 sed-array systems\,\nand low-power radios. His latest research interests a
 lso include cryogenic CMOS integrated electronics for qubit\ncontrol in fa
 ult tolerant scalable quantum computers.\nBefore joining Intel\, Stefano g
 ot his Laurea and PhD degrees from Politecnico di Milano\, Italy\, in 2000
  and\n2004 respectively\, after an internship in 2003 with Agere System (f
 ormer Bell Labs) in Allentown\, PA. His PhD\nthesis focused on the design 
 of fully-integrated low-power frequency synthesizers for WLAN applications
 .\nStefano has authored or co-authored more than 40 IEEE conference and jo
 urnal papers\, one book chapter and\nmore than 15 issued patents. He is th
 e Wireless Subcommittee Chair of the International Solid-State Circuit\nCo
 nference (ISSCC) and the TPC Chair of the Radio Frequency Integrated Circu
 it (RFIC) Symposium.\n\nCo-sponsored by: Hua Wang\n\nRoom: 218\, Bldg: Van
  Leer\, Georgia Tech\, Atlanta\, Georgia\, United States
LOCATION:Room: 218\, Bldg: Van Leer\, Georgia Tech\, Atlanta\, Georgia\, Un
 ited States
ORGANIZER:hua.wang@ece.gatech.edu
SEQUENCE:4
SUMMARY:IEEE SSCS/CAS Invited Seminar: Should RFIC Designers Care About Qua
 ntum Computing?
URL;VALUE=URI:https://events.vtools.ieee.org/m/186863
X-ALT-DESC:Description: &lt;br /&gt;&lt;p&gt;Title:&amp;nbsp\;Should RFIC Designers Care Ab
 out Quantum Computing?&lt;/p&gt;\n&lt;p&gt;Abstract: This talk will briefly introduce 
 few of the basic concepts of quantum&lt;br /&gt;computing and focus on some aspe
 cts of the control systems required to manipulate&lt;br /&gt;and read-out quantu
 m states of specific types of qubits. The talk will then try to&lt;br /&gt;addre
 ss why and how mixed-signal and RFIC design combined with large scale&lt;br /
 &gt;integration has the potential of accelerating the implementation of a fau
 lt-tolerant&lt;br /&gt;scalable quantum computer.&lt;/p&gt;\n&lt;p&gt;&lt;br /&gt;Speaker Biograph
 y: Stefano is a principal engineer at Intel Labs\, leading the Next&lt;br /&gt;G
 eneration Radio Integration Lab. He drives several research activities foc
 used at&lt;br /&gt;enabling radio circuit integration in deeply-scaled CMOS tech
 nologies.&lt;br /&gt;Since joining Intel Labs in 2004\, Stefano worked on MIMO t
 ransceivers for WiFi\, digital PLLs\, high-efficient&lt;br /&gt;digital architec
 tures for polar and outphasing transmitters\, mm-wave radio transceiver an
 d phased-array systems\,&lt;br /&gt;and low-power radios. His latest research in
 terests also include cryogenic CMOS integrated electronics for qubit&lt;br /&gt;
 control in fault tolerant scalable quantum computers.&lt;br /&gt;Before joining 
 Intel\, Stefano got his Laurea and PhD degrees from Politecnico di Milano\
 , Italy\, in 2000 and&lt;br /&gt;2004 respectively\, after an internship in 2003
  with Agere System (former Bell Labs) in Allentown\, PA. His PhD&lt;br /&gt;thes
 is focused on the design of fully-integrated low-power frequency synthesiz
 ers for WLAN applications.&lt;br /&gt;Stefano has authored or co-authored more t
 han 40 IEEE conference and journal papers\, one book chapter and&lt;br /&gt;more
  than 15 issued patents. He is the Wireless Subcommittee Chair of the Inte
 rnational Solid-State Circuit&lt;br /&gt;Conference (ISSCC) and the TPC Chair of
  the Radio Frequency Integrated Circuit (RFIC) Symposium.&lt;/p&gt;
END:VEVENT
END:VCALENDAR

