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DTSTART:20190310T030000
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DTSTAMP:20190207T220938Z
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DTSTART;TZID=US/Pacific:20190207T113000
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DESCRIPTION:Heterogeneous Integration (HI) of disparate computing and commu
 nications functions is a key enabler of performance in micro-electronic sy
 stems. HI is crucially enabled by advanced packaging since packages are an
  optimal HI platform. This talk will address the role of advanced packagin
 g in enabling HI and will focus primarily on the technology evolution of p
 ackage interconnect densities. It will show how 2D and 3Dpackaging has evo
 lved to provide increased interconnect density and how the different techn
 ology solutions available today meet the demands of diverse markets. Key h
 igh end technologies such as EMIB\, the silicon interposer and Foveros wil
 l be discussed in this context. The talk will also touch on the evolving f
 uture challenges in interconnect density scaling. In addition to interconn
 ect scaling\, this talk will also briefly discuss challenges and opportuni
 ties in key areas such as power management\, high speed IO\, thermal manag
 ement\, test and FI/FA.\n\nSpeaker(s): Deepak\, \n\nBldg: Building E Confe
 rence Center\, 2900 Semiconductor Dr. \, Santa Clara\, California\, United
  States\, 95054
LOCATION:Bldg: Building E Conference Center\, 2900 Semiconductor Dr. \, San
 ta Clara\, California\, United States\, 95054
ORGANIZER:anmalik@ieee.org
SEQUENCE:2
SUMMARY:Advanced Packaging: A Perspective on 2D and 3D Architectures
URL;VALUE=URI:https://events.vtools.ieee.org/m/187622
X-ALT-DESC:Description: <br /><p>Heterogeneous Integration (HI) of disparat
 e computing and communications functions is a key enabler of performance i
 n micro-electronic systems.&nbsp\; HI is crucially enabled by advanced pac
 kaging since packages are an optimal HI platform.&nbsp\; This talk will ad
 dress the role of advanced packaging in enabling HI and will focus primari
 ly on the technology evolution of package interconnect densities.&nbsp\; I
 t will show how 2D and 3Dpackaging has evolved to provide increased interc
 onnect density and how the different technology solutions available today 
 meet the demands of diverse markets.&nbsp\; Key high end technologies such
  as EMIB\, &nbsp\;the silicon interposer and Foveros will be discussed in 
 this context.&nbsp\; The talk will also touch on the evolving future chall
 enges in interconnect density scaling.&nbsp\; In addition to interconnect 
 scaling\, this talk will also briefly discuss challenges and opportunities
  in key areas such as power management\, high speed IO\, thermal managemen
 t\, test and FI/FA.</p>
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