BEGIN:VCALENDAR VERSION:2.0 PRODID:IEEE vTools.Events//EN CALSCALE:GREGORIAN BEGIN:VTIMEZONE TZID:US/Eastern BEGIN:DAYLIGHT DTSTART:20190310T030000 TZOFFSETFROM:-0500 TZOFFSETTO:-0400 RRULE:FREQ=YEARLY;BYDAY=2SU;BYMONTH=3 TZNAME:EDT END:DAYLIGHT BEGIN:STANDARD DTSTART:20191103T010000 TZOFFSETFROM:-0400 TZOFFSETTO:-0500 RRULE:FREQ=YEARLY;BYDAY=1SU;BYMONTH=11 TZNAME:EST END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20190825T202959Z UID:30DB5887-EA86-419F-91B7-13885B29A338 DTSTART;TZID=US/Eastern:20190412T090000 DTEND;TZID=US/Eastern:20190412T173000 DESCRIPTION:--------------------------------------------------------------- \n\nThe [Center for Signal Integrity](https://harrisburg.psu.edu/center-si gnal-integrity) at Penn State Harrisburg will host the Thirteenth Central Pennsylvania Symposium on Signal Integrity\, Friday\, April 12\, 2019 from 8 a.m. to 4:30 p.m. in the Morrison Gallery (Library Building) on campus. Signal integrity involves the quality of electrical signals passing throu gh connectors used in electronic devices like computers or cellular phones . Note: Free parking only on the Library Parking lot (https://harrisburg.p su.edu/places/library). Anywhere else on campus\, please get a temporary p arking permit from one of the automated kiosks and place it on the dashboa rd. Registration fee includes light breakfast and lunch.\n\nCo-sponsored b y: Penn State Harrisburg\n\nSpeaker(s): Gustavo Blando\, Nathan Tracy\n\nA genda: \n8:00 to 8:30\n\nRegistration Breakfast\, April 12\, 2019\n\n8:30 to 9:30\n\nWelcome and Plenary Speaker 1\, Main Room\n\nMr. Gustavo Blando \, Samtec. Title “Increasing Broadband Interconnect Characterization to 60GHZ ”\n\nGustavo Blando is a Senior Principle Engineer leading the Pri ncipal SI/PI Architect at Samtec Inc. where he's charged with the developm ent of new SI/PI methodologies\, high speed characterization\, tools and m odeling in general.\n\nAbstract:\n\nAs we continue to push for higher freq uencies\, manufacturing tolerances becomes a limiting factor. This is spec ially true for high-frequency coax launches. Any variation in pad\, antipa d\, drill location and dimension makes a very noticeable difference in fre quency and time domain plots. In this study\, I’ll go through a debug ex ercise on a test board to show what to expect for one of this manufacturin g variations. Simulations and measurement in the time and frequency domain measurements together with CT scan of boards will be shown to illustrate and connect the fabrication tolerance problem to lab results.\n\n9:40 to 1 1:10\n\nWorkshop 1\, Keysight\n(Main Room)\n\nOJ Danzy and Russ Kramer "A Practical Guide to Signal Integrity: From Simulation to Measurement”\n\n Bios:\n\nOJ Danzy is a RF and Microwave Application Engineer at Keysight T echnologies specializing in areas surrounding physical layer test\, networ k analysis\, test system design and automation. He received BSc in EE from Tennessee State University and a Master of EE from Cornell University.\n\ nBio: Russ Kramer specializes in IC business development at Keysight (Agil ent EEsof). He holds a BSc and a master’s degree in EE from Pennsylvania State University (UP) and an MBA from Loyola College (.\n\nWorkshop 2\, A nsys\nAnsys Workshop\n\nBill McGinn\, Senior Application Engineer\, Ansys Inc.\n\nElectromagnetic Simulation Techniques for High Speed Connector and PCB Applications\n\nAbstract: This presentation will discuss advances in Electronics simulation techniques including: FEM and Transient Electromagn etic Simulation techniques\; Automated Connector/Board Assembly Meshing/An alysis\; Electromagnetics Based EMI/EMC Analysis\; Crosstalk/Impedance Sca nning\; Integrated Electronics/Thermal Analysis (Multiphysics)\, etc.\n\nB io: Bill McGinn is a Senior Application Engineer at ANSYS Corp. with over 20 years of experience in engineering simulation.\n\n11:15 to 12:15\n\nPle nary Speaker 2\n\nAl Neves\, Wildriver Technologies\, Title “ Moving Tow ards 112G PAM-4 Characterization - Challenges\, Crux Issues”\n\n12:15 to 1:10\n\nLunch Speaker:\n\nNathan Tracy\, TE Connectivity\, Title “ 112 Gbps Electrical Interfaces: Does rate drive architecture or does architect ure enable rate”\n\nAbstract: As the industry plans it’s move to 112 G bps\, a number of signal integrity challenges must be addressed. Technolog y improvements will no doubt be part of the solution\, but it is likely th at evolving architectures will also be part of the solution. This presenta tion will discuss the industry trends driving the need to move forward to 112 Gbps\, the electrical channels and electrical architectures anticipate d to be part of the 112Gbps components\, equipment\, and networks\, and fi nally\, share some analysis results based on some of these channels.\n\nBi o: As a technologist on the system architecture team and manager of indust ry standards for the Data and Devices business unit at TE Connectivity (TE )\, Nathan is responsible for driving standards activities and working wit h key customers to enable new system architectures. Nathan has more than 3 0 years of experience in technology development\, marketing and business d evelopment for TE.mNathan holds a BSc in EET from the University of Massac husetts\, Dartmouth.\n\n1:15 to 2:15\n\nPlenary Speaker 3\n\nTracy Vincent \, Dassault Systems\, title “Equivalent Capacitance and Multilayer Model s for Effective Roughness Dielectric in PCBs with Coupling Study Shown for the Representation of Surface Roughness\,”\n\nAbstract:\n\nIn this work \, the equivalent capacitance approach is used to get the Effective Roughn ess Dielectric (ERD) parameters based on the understanding that there is a gradual variation of concentration of metallic inclusions in the transiti on layer between the dielectric and foil. The metallic concentration profi le can be extracted from scanning electron microscopy or high-resolution o ptical microscopy. The proposed model of equivalent capacitance with gradi ent dielectric is applied to standard\, very-low-profile\, and hyper-very- low profile foils\, and the frequency-dependent dielectric parameters of t he homogenized ERD are calculated. All the models show excellent agreement with measurements.\n\nTracey is a support engineer for CST software\, Das sault Systemes\, Boston. She has a combined Bachelors/Masters Degree in EE from Herriot-Watt University in Edinburgh\, Scotland. She also has a Ph.D . in Material Science from WPI in Worcester\, MA.\n\n2:30 to 4:00\n\nWorks hop 3 (Main Room)\n\nGreg Bonaguide\, Rohde & Schwarz USA\, Inc.\n\nTitle: Advances in VNA-based Signal Integrity Tools and Techniques.\n\nAbstract: In this workshop we demonstrate new de-embedding techniques integrated in to VNA firmware that make frequency-domain signal integrity measurements e asier\, more accurate\, and less error-prone. We also present new tools to predict system response to arbitrary time domain signals. By implementing a "virtual" signal generator for multilevel PAM signals (NRZ\,PAM-4\, PAM -8\, PAM-16)\, coupled with the impulse response of the measured S-paramet ers\, eye diagrams are produced and updated in real-time.\n\nBio: Greg Bon aguide is a National Applications Engineer for Rohde & Schwarz\, specializ ing in Spectrum Analyzers and Vector Network Analyzers and focusing on RF & Microwave Component testing.\n\nWorkshop 4\n\nJohn Smith: Tektronix\n\nT ektronix PAM4 workshop.\n\nTektronix will be discussing 400G test and meas urement challenges. Specifically\, we will focus on performing transmitter measurements of PAM4 modulated signals. We will discuss and review some o f the pros and cons of using sampling oscilloscopes vs using real time osc illoscopes in making PAM4 measurements in the optical and electrical domai ns.\n\nBio: John Smith is Sr. Applications Engineer at Tektronix\, Inc. Hi s primary focus is high speed serial data communications\, including direc t detect and phase detect communications systems.\n\nRoom: Morrison\, Bldg : Library\, 777 West Harrisburg Pike\, Middletown\, Pennsylvania\, United States\, 17057-4898 LOCATION:Room: Morrison\, Bldg: Library\, 777 West Harrisburg Pike\, Middle town\, Pennsylvania\, United States\, 17057-4898 ORGANIZER:awm2@psu.edu SEQUENCE:18 SUMMARY:13th Central PA Symposium on Signal Integrity URL;VALUE=URI:https://events.vtools.ieee.org/m/195970 X-ALT-DESC:Description: <br /><hr class="hr-solid hr-extended ieee_bright_o range_bt2" style="clear: both\;" />\n<p><span style="font-size: 14pt\;">Th e <a href="https://harrisburg.psu.edu/center-signal-integrity">Center for Signal Integrity</a> at Penn State Harrisburg will host the Thirteenth&nbs p\; Central Pennsylvania Symposium on Signal Integrity\, Friday\, April 12 \, 2019 from 8 a.m. to 4:30 p.m. in the Morrison Gallery (Library Building ) on campus. Signal integrity involves the quality of electrical signals p assing through connectors used in electronic devices like computers or cel lular phones. <strong>Note</strong>: Free parking only on the Library Park ing lot (https://harrisburg.psu.edu/places/library). Anywhere else on camp us\, please get a temporary parking permit from one of the automated kiosk s and place it on the dashboard. <strong>Registration fee includes light b reakfast and lunch</strong>.</span></p><br /><br />Agenda: <br /><table wi dth="0">\n<tbody>\n<tr>\n<td width="23%">\n<p>8:00 to 8:30&nbsp\;</p>\n</t d>\n<td colspan="2" width="75%">\n<p><strong>Registration Breakfast\, Apri l 12\, 2019</strong></p>\n</td>\n</tr>\n<tr>\n<td width="23%">\n<p>8:30 to 9:30 &nbsp\;</p>\n</td>\n<td colspan="2" width="75%">\n<p><strong>Welcome and Plenary Speaker 1\, Main Room</strong></p>\n<p><strong>Mr. Gustavo Bl ando\, Samtec.</strong> <strong>Title</strong> <strong>&ldquo\;Increasing Broadband Interconnect Characterization to 60GHZ &rdquo\;</strong></p>\n<p ><strong>Gustavo Blando </strong>is a Senior Principle Engineer leading th e Principal SI/PI Architect at Samtec Inc. where he's charged with the dev elopment of new SI/PI methodologies\, high speed characterization\, tools and modeling in general.</p>\n<p><strong>Abstract:</strong></p>\n<p>As we continue to push for higher frequencies\, manufacturing tolerances becomes a limiting factor. This is specially true for high-frequency coax launche s. Any variation in pad\, antipad\, drill location and dimension makes a v ery noticeable difference in frequency and time domain plots. In this stud y\, I&rsquo\;ll go through a debug exercise on a test board to show what t o expect for one of this manufacturing variations. Simulations and measure ment in the time and frequency domain measurements together with CT scan o f boards will be shown to illustrate and connect the fabrication tolerance problem to lab results.</p>\n</td>\n</tr>\n<tr>\n<td width="23%">\n<p>9:4 0 to 11:10</p>\n</td>\n<td width="40%">\n<p><strong>Workshop 1\,&nbsp\; Ke ysight<br /> (Main Room)</strong></p>\n<p>OJ Danzy and Russ Kramer <strong >"A Practical Guide to Signal Integrity: From Simulation to Measurement&rd quo\;</strong></p>\n<p>Bios:</p>\n<p>OJ Danzy is a RF and Microwave Applic ation Engineer at Keysight Technologies specializing in areas surrounding physical layer test\, network analysis\, test system design and automation . He received BSc in EE from Tennessee State University and a Master of EE from Cornell University.</p>\n<p>Bio: Russ Kramer specializes in IC busin ess development at Keysight (Agilent EEsof). He holds a BSc and a master&r squo\;s degree in EE from Pennsylvania State University (UP) and an MBA fr om Loyola College (.</p>\n</td>\n<td width="34%">\n<table width="0">\n<tbo dy>\n<tr>\n<td width="34%">\n<p><strong>Workshop 2\, Ansys</strong><br /> &nbsp\;Ansys Workshop</p>\n<p>Bill McGinn\, Senior Application Engineer\, Ansys Inc.</p>\n<p><strong>Electromagnetic Simulation Techniques for High Speed Connector and PCB Applications </strong></p>\n<p>Abstract: This pres entation will discuss advances in Electronics simulation techniques includ ing: FEM and Transient Electromagnetic Simulation techniques\; Automated C onnector/Board Assembly Meshing/Analysis\; Electromagnetics Based EMI/EMC Analysis\; Crosstalk/Impedance Scanning\; Integrated Electronics/Thermal A nalysis (Multiphysics)\, etc.</p>\n<p>Bio: Bill McGinn is a Senior Applica tion Engineer at ANSYS Corp. with over 20 years of experience in engineeri ng simulation. &nbsp\;</p>\n</td>\n</tr>\n</tbody>\n</table>\n</td>\n</tr> \n<tr>\n<td width="23%">\n<p>11:15 to 12:15&nbsp\;</p>\n</td>\n<td colspan ="2" width="75%">\n<p><strong>Plenary Speaker 2</strong></p>\n<p><strong>A l Neves\, Wildriver Technologies\, Title</strong> <strong>&ldquo\;&nbsp\; Moving Towards 112G PAM-4 Characterization -&nbsp\; Challenges\, Crux Issu es&rdquo\;</strong></p>\n<p><strong>&nbsp\;</strong></p>\n</td>\n</tr>\n<t r>\n<td width="23%">\n<p>12:15 to 1:10</p>\n</td>\n<td colspan="2" width=" 75%">\n<p><strong>Lunch Speaker:</strong></p>\n<p><strong>Nathan Tracy\, T E Connectivity\, Title &ldquo\; 112 Gbps Electrical Interfaces: Does rate drive architecture or does architecture enable rate&rdquo\;</strong></p>\n <p>Abstract: As the industry plans it&rsquo\;s move to 112 Gbps\, a number of signal integrity challenges must be addressed.&nbsp\; Technology impro vements will no doubt be part of the solution\, but it is likely that evol ving architectures will also be part of the solution.&nbsp\; This presenta tion will discuss the industry trends driving the need to move forward to 112 Gbps\, the electrical channels and electrical architectures anticipate d to be part of the 112Gbps components\, equipment\, and networks\, and fi nally\, share some analysis results based on some of these channels.</p>\n <p><strong>&nbsp\;</strong>Bio: As a technologist on the system architectu re team and manager of industry standards for the Data and Devices busines s unit at TE Connectivity (TE)\, Nathan is responsible for driving standar ds activities and working with key customers to enable new system architec tures. Nathan has more than 30 years of experience in technology developme nt\, marketing and business development for TE.mNathan holds a BSc in&nbsp \; EET from the University of Massachusetts\, Dartmouth.</p>\n</td>\n</tr> \n<tr>\n<td width="23%">\n<p>1:15 to 2:15</p>\n</td>\n<td colspan="2" widt h="75%">\n<p><strong>Plenary Speaker 3</strong></p>\n<p><strong>Tracy Vinc ent\, Dassault &nbsp\;Systems\, title &ldquo\;Equivalent Capacitance and M ultilayer Models for Effective Roughness Dielectric in PCBs with Coupling Study Shown for the Representation of Surface Roughness\,&rdquo\;</strong> </p>\n<p><strong>Abstract:</strong></p>\n<p>In this work\, the equivalent capacitance approach is used to get the Effective Roughness Dielectric&nbs p\; (ERD) parameters based on the understanding that there is a gradual va riation of concentration of metallic inclusions in the transition layer be tween the dielectric and foil. The metallic concentration profile can be e xtracted from scanning electron microscopy or high-resolution optical micr oscopy. The proposed model of equivalent capacitance with gradient dielect ric is applied to standard\, very-low-profile\, and hyper-very-low profile &nbsp\; foils\, and the frequency-dependent dielectric parameters of the h omogenized ERD are calculated. All the models show excellent agreement wit h measurements.</p>\n<p><strong>Tracey </strong>is a support engineer for CST software\, Dassault Systemes\, Boston. She has a combined Bachelors/Ma sters Degree in EE from Herriot-Watt University in Edinburgh\, Scotland. S he also has a Ph.D. in Material Science from WPI in Worcester\, MA.</p>\n< /td>\n</tr>\n<tr>\n<td width="23%">\n<p>2:30 to 4:00</p>\n</td>\n<td width ="40%">\n<p><strong>Workshop 3 (Main Room)</strong></p>\n<p><strong>Greg B onaguide\,</strong> <strong>Rohde &amp\; Schwarz USA\, Inc.</strong></p>\n <p><strong>Title:&nbsp\; Advances in VNA-based Signal Integrity Tools and Techniques</strong>.</p>\n<p>Abstract:&nbsp\; In this workshop we demonstr ate new de-embedding techniques integrated into VNA firmware that make fre quency-domain signal integrity measurements easier\, more accurate\, and l ess error-prone.&nbsp\; We also present new tools to predict system respon se to arbitrary time domain signals.&nbsp\; By implementing a "virtual" si gnal generator for multilevel PAM signals (NRZ\,PAM-4\, PAM-8\, PAM-16)\, coupled with the impulse response of the measured S-parameters\, eye diagr ams are produced and updated in real-time.</p>\n<p>Bio: Greg Bonaguide is a National Applications Engineer for Rohde &amp\; Schwarz\, specializing i n Spectrum Analyzers and Vector Network Analyzers and focusing on RF &amp\ ; Microwave Component testing.&nbsp\;&nbsp\;</p>\n<p><strong>&nbsp\;</stro ng></p>\n<p>&nbsp\;</p>\n</td>\n<td width="34%">\n<p><strong>Workshop 4</s trong></p>\n<p><strong>John Smith: Tektronix</strong></p>\n<p>Tektronix PA M4 workshop.</p>\n<p>Tektronix will be discussing 400G test and measuremen t challenges. Specifically\, we will focus on performing transmitter measu rements of PAM4 modulated signals. We will discuss and review some of the pros and cons of using sampling oscilloscopes vs using real time oscillosc opes in making PAM4 measurements in the optical and electrical domains.&nb sp\;</p>\n<p>&nbsp\;</p>\n<p>Bio: John Smith is Sr. Applications Engineer at Tektronix\, Inc. His primary focus is high speed serial data communicat ions\, including direct detect and phase detect communications systems.&nb sp\;</p>\n<p><strong>&nbsp\;</strong></p>\n</td>\n</tr>\n</tbody>\n</table > END:VEVENT END:VCALENDAR