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DTSTAMP:20190809T043434Z
UID:AA70DDD7-369F-4762-9FEF-262C96325E76
DTSTART;TZID=America/Los_Angeles:20190808T150000
DTEND;TZID=America/Los_Angeles:20190808T163000
DESCRIPTION:A semiconductor memory is a ubiquitous component of all electro
 nic systems\, coupled with a microprocessor for computing or integrated to
  store information. As the semiconductor ecosystem expands to such areas l
 ike mobile computing\, artificial intelligence (AI)\, Big Data\, Internet-
 of-Things (IOT)\, life science and healthcare applications\, the prevalenc
 e of these markets largely depend on memory innovations. This has propelle
 d increasing efforts in researching\, developing\, and commercializing eme
 rging memory technologies\, such as PCM (phase-change memory\, or PRAM)\, 
 MRAM (magnetoresistive RAM)\, RRAM (resistive RAM)\, and FRAM (ferroelectr
 ic RAM). This presentation overviews these emerging memories from the pers
 pectives of device\, design\, integration\, and application. Also covered 
 is the prospect of embedding these memories into advanced integrated circu
 its. By far\, all emerging memory prototypes and products are built upon r
 elatively mature CMOS technologies such as 22nm and 28nm. For the applicat
 ions that have traditionally relied on embedded Flash\, these nodes are st
 ill advanced\, and such memories can serve IOT\, security\, automotive\, a
 nd some machine learning applications competitively. However\, emerging me
 mories have not entered the domain of advanced logic nodes (7nm already in
  production) and have yet to be proven as a sustainable technology for per
 vasive applications. This transition necessitates the memory attributes th
 at must go beyond the specifications of present product offerings. A key c
 hallenge is to achieve a combination of high speed and high endurance for 
 high-density arrays compatible with sub-10nm CMOS devices. This requires d
 eeply scaled memory elements with fast switching at low current and high d
 ielectric barrier reliability. Efforts are also desired for custom memorie
 s which can be tailored in various densities and form factors for heteroge
 neously partitioned systems.\n\nSan Diego\, California\, United States
LOCATION:San Diego\, California\, United States
ORGANIZER:alvin.loke@alumni.stanford.edu
SEQUENCE:1
SUMMARY:Emerging Memories and Pathfinding for the Era of Sub-10nm System-on
 -Chip
URL;VALUE=URI:https://events.vtools.ieee.org/m/201786
X-ALT-DESC:Description: &lt;br /&gt;&lt;p&gt;A semiconductor memory is a ubiquitous com
 ponent of all electronic systems\, coupled with a microprocessor for compu
 ting or integrated to store information. As the semiconductor ecosystem ex
 pands to such areas like mobile computing\, artificial intelligence (AI)\,
  Big Data\, Internet-of-Things (IOT)\, life science and healthcare applica
 tions\, the prevalence of these markets largely depend on memory innovatio
 ns. This has propelled increasing efforts in researching\, developing\, an
 d commercializing emerging memory technologies\, such as PCM (phase-change
  memory\, or PRAM)\, MRAM (magnetoresistive RAM)\, RRAM (resistive RAM)\, 
 and FRAM (ferroelectric RAM). This presentation overviews these emerging m
 emories from the perspectives of device\, design\, integration\, and appli
 cation. Also covered is the prospect of embedding these memories into adva
 nced integrated circuits. By far\, all emerging memory prototypes and prod
 ucts are built upon relatively mature CMOS technologies such as 22nm and 2
 8nm. For the applications that have traditionally relied on embedded Flash
 \, these nodes are still advanced\, and such memories can serve IOT\, secu
 rity\, automotive\, and some machine learning applications competitively. 
 However\, emerging memories have not entered the domain of advanced logic 
 nodes (7nm already in production) and have yet to be proven as a sustainab
 le technology for pervasive applications. This transition necessitates the
  memory attributes that must go beyond the specifications of present produ
 ct offerings. A key challenge is to achieve a combination of high speed an
 d high endurance for high-density arrays compatible with sub-10nm CMOS dev
 ices. This requires deeply scaled memory elements with fast switching at l
 ow current and high dielectric barrier reliability. Efforts are also desir
 ed for custom memories which can be tailored in various densities and form
  factors for heterogeneously partitioned systems.&lt;/p&gt;
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