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DESCRIPTION:CASS-SCV Artificial Intelligence for Industry (AI4I) Forum - Fa
 ll 2019\n\nEvent sponsored and organized by:\n\n[IEEE Circuits and Systems
  Society (CASS)](https://www.ieee-cas.org/)\n\nCo-sponsors:\n\n- [Circuits
  and Systems Society - Santa Clara Valley Chapter (CASS-SCV)](http://sites
 .ieee.org/scv-cas/)\n- [Computer Society (CS)](http://computer.ieeesilicon
 valley.org/)\n- [Computational Intelligence Society (CIS)](https://ieee-re
 gion6.org/scv-cis/)\n- [Solid-State Circuits Society(SSCS)](http://sites.i
 eee.org/scv-sscs/upcoming-events/)\n- [Signal Processing Society(SPS)](htt
 ps://ewh.ieee.org/r6/scv/sps/)\n- [Communication Society (ComSoC)](https:/
 /www.meetup.com/IEEE-ComSoc-SCV/)\n\nDATE &amp; TIME:\n\nFriday\, September 6t
 h\, 2019. 1 PM - 5 PM\n\nPROGRAM:\n\n1:00 - 1:30 PM Check-in / Networking 
 &amp; Refreshments\n\n1:30 - 2:15 PM Prof. S.Y. Kung (Princeton)\n\n2:15 - 3:0
 0 PM Pete Warden (Google)\n\n3:30 - 4:15 PM TBD\n\n4:15 - 5:00 PM TBD\n\n5
 :00 PM Adjourn\n\nLOCATION:\n\nIntel SC-9 Auditorium\n\n2191 Laurelwood Rd
 \, Santa Clara\, CA 95054 (Northwest corner of 101 &amp; Montague Expwy)\n\nAG
 ENDA:\n\n1:30 - 2:15 PM Prof. S.Y. Kung (Princeton)\n\nTITLE: From Deep Le
 arning to X-Learning: An Internal and Explainable Learning for XAI\n\nABST
 RACT: The success of deep Learning (or AI2.0) depends solely on Back-propa
 gation (BP)\, a external learning paradigm\, whose supervision is exclusiv
 ely accessed via the external interfacing nodes (i.e. input/output neurons
 ). As such\, Deep Learning has been limited to the parameter training of t
 he neural nets (NNs). The important task of designing optimal net structur
 es has to resort to trial and error. Therefore\, we shall design an Xnet w
 hich may be use to simultaneously train the structure and parameters of th
 e net. In addition\, it can facilitate Internal Neuron&#39;s Explainablility s
 o as to fully support DARPA&#39;s Explainable AI (i.e. XAI or AI3.0). Our inte
 rnal learning paradigm leads to an Explainable Neural Networks (Xnet) comp
 rising (1) internal teacher labels (ITL) and (2) internal optimization met
 rics (IOM). X-learning allows us to effectively rank the internal neurons 
 (hidden nodes) and thus sets the footing for the notion of structural grad
 ient and structural learning.\n\nPursuant to our simulation studies\, Xnet
  can simultaneously compress the structure and raise the accuracy. There i
 s evidence supporting that it may outperform many popular pruning/compress
 ion methods. Most importantly\, X-learning opens up promising research fro
 nts on (1) explainable learning models for XAI and (2) machine-to-machine 
 mutual learning which will become appealing in the 5G era\n\nBIO: S.Y. Kun
 g\, Life Fellow of IEEE\, is a Professor at Department of Electrical Engin
 eering in Princeton University. His research areas include multimedia info
 rmation processing\, machine learning\, systematic design of deep learning
  networks\, VLSI array processors\, and compressive privacy. He was a foun
 ding member of several Technical Committees (TC) of the IEEE Signal Proces
 sing Society. He was elected to Fellow in 1988 and served as a Member of t
 he Board of Governors of the IEEE Signal Processing Society (1989-1991). H
 e was a recipient of IEEE Signal Processing Society&#39;s Technical Achievemen
 t Award for the contributions on &quot;parallel processing and neural network a
 lgorithms for signal processing&quot; (1992)\; a Distinguished Lecturer of IEEE
  Signal Processing Society (1994)\; a recipient of IEEE Signal Processing 
 Society&#39;s Best Paper Award\; and a recipient of the IEEE Third Millennium 
 Medal (2000). Since 1990\, he has been the Editor-In-Chief of the Journal 
 of VLSI Signal Processing Systems. He has authored and co-authored more th
 an 500 technical publications and numerous textbooks including ``VLSI Arra
 y Processors&#39;&#39;\, Prentice-Hall (1988)\; ``Digital Neural Networks&#39;&#39;\, Pren
 tice-Hall (1993) \; ``Principal Component Neural Networks&#39;&#39;\, John-Wiley (
 1996)\; ``Biometric Authentication: A Machine Learning Approach&#39;&#39;\, Prenti
 ce-Hall (2004)\; and ``Kernel Methods and Machine Learning”\, Cambridge 
 University Press (2014).\n\n2:15 - 3:00 PM Pete Warden (Google)\n\nTITLE:\
 nABSTRACT:\n\nBIO:\n\n3:30 - 4:15 PM TBD\n\nTITLE:\n\nABSTRACT:\n\nBIO:\n\
 n4:15 - 5:00 PM TBD\n\nTITLE:\n\nABSTRACT:\n\nBIO:\n\nCo-sponsored by: Sol
 id State Circuits Society (SSCS)\, Computer Society (CS)\, Computational I
 ntelligence Society\n\nAgenda: \nCASS-SCV Artificial Intelligence for Indu
 stry (AI4I) Forum - Fall 2019\n\nEvent sponsored and organized by:\n\n[IEE
 E Circuits and Systems Society (CASS)](https://www.ieee-cas.org/)\n\nCo-sp
 onsors:\n\n- [Circuits and Systems Society - Santa Clara Valley Chapter (C
 ASS-SCV)](http://sites.ieee.org/scv-cas/)\n- [Computer Society (CS)](http:
 //computer.ieeesiliconvalley.org/)\n- [Computational Intelligence Society 
 (CIS)](https://ieee-region6.org/scv-cis/)\n- [Solid-State Circuits Society
 (SSCS)](http://sites.ieee.org/scv-sscs/upcoming-events/)\n- [Signal Proces
 sing Society(SPS)](https://ewh.ieee.org/r6/scv/sps/)\n- [Communication Soc
 iety (ComSoC)](https://www.meetup.com/IEEE-ComSoc-SCV/)\n\nDATE &amp; TIME:\n\
 nFriday\, September 6th\, 2019. 1 PM - 5 PM\n\nPROGRAM:\n\n1:00 - 1:30 PM 
 Check-in / Networking &amp; Refreshments\n\n1:30 - 2:15 PM Prof. S.Y. Kung (Pr
 inceton)\n\n2:15 - 3:00 PM Pete Warden (Google)\n\n3:30 - 4:15 PM TBD\n\n4
 :15 - 5:00 PM TBD\n\n5:00 PM Adjourn\n\nLOCATION:\n\nIntel SC-9 Auditorium
 \n\n2191 Laurelwood Rd\, Santa Clara\, CA 95054 (Northwest corner of 101 &amp;
  Montague Expwy)\n\nAGENDA:\n\n1:30 - 2:15 PM Prof. S.Y. Kung (Princeton)\
 n\nTITLE: From Deep Learning to X-Learning: An Internal and Explainable Le
 arning for XAI\n\nABSTRACT: The success of deep Learning (or AI2.0) depend
 s solely on Back-propagation (BP)\, a external learning paradigm\, whose s
 upervision is exclusively accessed via the external interfacing nodes (i.e
 . input/output neurons). As such\, Deep Learning has been limited to the p
 arameter training of the neural nets (NNs). The important task of designin
 g optimal net structures has to resort to trial and error. Therefore\, we 
 shall design an Xnet which may be use to simultaneously train the structur
 e and parameters of the net. In addition\, it can facilitate Internal Neur
 on&#39;s Explainablility so as to fully support DARPA&#39;s Explainable AI (i.e. X
 AI or AI3.0). Our internal learning paradigm leads to an Explainable Neura
 l Networks (Xnet) comprising (1) internal teacher labels (ITL) and (2) int
 ernal optimization metrics (IOM). X-learning allows us to effectively rank
  the internal neurons (hidden nodes) and thus sets the footing for the not
 ion of structural gradient and structural learning.\n\nPursuant to our sim
 ulation studies\, Xnet can simultaneously compress the structure and raise
  the accuracy. There is evidence supporting that it may outperform many po
 pular pruning/compression methods. Most importantly\, X-learning opens up 
 promising research fronts on (1) explainable learning models for XAI and (
 2) machine-to-machine mutual learning which will become appealing in the 5
 G era\n\nBIO: S.Y. Kung\, Life Fellow of IEEE\, is a Professor at Departme
 nt of Electrical Engineering in Princeton University. His research areas i
 nclude multimedia information processing\, machine learning\, systematic d
 esign of deep learning networks\, VLSI array processors\, and compressive 
 privacy. He was a founding member of several Technical Committees (TC) of 
 the IEEE Signal Processing Society. He was elected to Fellow in 1988 and s
 erved as a Member of the Board of Governors of the IEEE Signal Processing 
 Society (1989-1991). He was a recipient of IEEE Signal Processing Society&#39;
 s Technical Achievement Award for the contributions on &quot;parallel processin
 g and neural network algorithms for signal processing&quot; (1992)\; a Distingu
 ished Lecturer of IEEE Signal Processing Society (1994)\; a recipient of I
 EEE Signal Processing Society&#39;s Best Paper Award\; and a recipient of the 
 IEEE Third Millennium Medal (2000). Since 1990\, he has been the Editor-In
 -Chief of the Journal of VLSI Signal Processing Systems. He has authored a
 nd co-authored more than 500 technical publications and numerous textbooks
  including ``VLSI Array Processors&#39;&#39;\, Prentice-Hall (1988)\; ``Digital Ne
 ural Networks&#39;&#39;\, Prentice-Hall (1993) \; ``Principal Component Neural Net
 works&#39;&#39;\, John-Wiley (1996)\; ``Biometric Authentication: A Machine Learni
 ng Approach&#39;&#39;\, Prentice-Hall (2004)\; and ``Kernel Methods and Machine Le
 arning”\, Cambridge University Press (2014).\n\n2:15 - 3:00 PM Pete Ward
 en (Google)\n\nTITLE:\nABSTRACT:\n\nBIO:\n\n3:30 - 4:15 PM TBD\n\nTITLE:\n
 \nABSTRACT:\n\nBIO:\n\n4:15 - 5:00 PM TBD\n\nTITLE:\n\nABSTRACT:\n\nBIO:\n
 \nBldg: Intel SC-9 Auditorium\, Intel SC-9 Auditorium\, 2191 Laurelwood Rd
 \, Santa Clara\, California\, United States\, 95054 
LOCATION:Bldg: Intel SC-9 Auditorium\, Intel SC-9 Auditorium\, 2191 Laurelw
 ood Rd\, Santa Clara\, California\, United States\, 95054 
ORGANIZER:imran.bashir@ieee.org
SEQUENCE:1
SUMMARY:CASS-SCV Artificial Intelligence for Industry (AI4I) Forum – Fall
  2019
URL;VALUE=URI:https://events.vtools.ieee.org/m/201910
X-ALT-DESC:Description: &lt;br /&gt;&lt;h2 style=&quot;font-weight: 600\;&quot;&gt;&lt;strong&gt;CASS-S
 CV Artificial Intelligence for Industry (AI4I) Forum - Fall 2019&lt;/strong&gt;&lt;
 /h2&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;Event sponsored and organized by:&lt;/p&gt;\
 n&lt;p style=&quot;font-weight: 400\;&quot;&gt;&lt;a href=&quot;https://www.ieee-cas.org/&quot;&gt;IEEE Ci
 rcuits and Systems Society (CASS)&lt;/a&gt;&lt;/p&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;C
 o-sponsors:&lt;/p&gt;\n&lt;ul style=&quot;font-weight: 400\;&quot;&gt;\n&lt;li&gt;&lt;a href=&quot;http://site
 s.ieee.org/scv-cas/&quot;&gt;Circuits and Systems Society - Santa Clara Valley Cha
 pter (CASS-SCV)&lt;/a&gt;&lt;/li&gt;\n&lt;li&gt;&lt;a href=&quot;http://computer.ieeesiliconvalley.o
 rg/&quot;&gt;Computer Society (CS)&lt;/a&gt;&lt;/li&gt;\n&lt;li&gt;&lt;a href=&quot;https://ieee-region6.org
 /scv-cis/&quot;&gt;Computational Intelligence Society&amp;nbsp\;(CIS)&lt;/a&gt;&lt;/li&gt;\n&lt;li&gt;&lt;a
  href=&quot;http://sites.ieee.org/scv-sscs/upcoming-events/&quot;&gt;Solid-State Circui
 ts Society(SSCS)&lt;/a&gt;&lt;/li&gt;\n&lt;li&gt;&lt;a href=&quot;https://ewh.ieee.org/r6/scv/sps/&quot;&gt;
 Signal Processing Society(SPS)&lt;/a&gt;&lt;/li&gt;\n&lt;li&gt;&lt;a href=&quot;https://www.meetup.c
 om/IEEE-ComSoc-SCV/&quot;&gt;Communication Society (ComSoC)&lt;/a&gt;&lt;/li&gt;\n&lt;/ul&gt;\n&lt;h2 s
 tyle=&quot;font-weight: 600\;&quot;&gt;DATE &amp;amp\; TIME:&lt;/h2&gt;\n&lt;p style=&quot;font-weight: 4
 00\;&quot;&gt;Friday\, September 6th\, 2019. 1 PM - 5 PM&lt;/p&gt;\n&lt;h2 style=&quot;font-weig
 ht: 600\;&quot;&gt;PROGRAM:&lt;/h2&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;1:00 - 1:30 PM Che
 ck-in / Networking &amp;amp\; Refreshments&lt;/p&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;
 1:30 - 2:15 PM Prof.&amp;nbsp\;S.Y. Kung (Princeton)&lt;/p&gt;\n&lt;p style=&quot;font-weigh
 t: 400\;&quot;&gt;2:15 - 3:00 PM Pete Warden&amp;nbsp\;(Google)&lt;/p&gt;\n&lt;p style=&quot;font-we
 ight: 400\;&quot;&gt;3:30 - 4:15 PM TBD&lt;/p&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;4:15 - 
 5:00 PM TBD&lt;/p&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;5:00 PM Adjourn&lt;/p&gt;\n&lt;h2 st
 yle=&quot;font-weight: 600\;&quot;&gt;LOCATION:&lt;/h2&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;Int
 el SC-9 Auditorium&lt;/p&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;2191 Laurelwood Rd\,
  Santa Clara\, CA 95054 (Northwest corner of 101 &amp;amp\; Montague Expwy)&lt;/p
 &gt;\n&lt;h2 style=&quot;font-weight: 600\;&quot;&gt;AGENDA:&lt;/h2&gt;\n&lt;p style=&quot;font-weight: 400
 \;&quot;&gt;&lt;strong&gt;1:30 - 2:15 PM Prof.&amp;nbsp\;S.Y. Kung (Princeton)&lt;/strong&gt;&lt;/p&gt;\
 n&lt;p style=&quot;font-weight: 400\;&quot;&gt;&lt;strong&gt;TITLE:&lt;/strong&gt;&amp;nbsp\;From Deep Lea
 rning to X-Learning: An Internal and Explainable Learning for XAI&lt;/p&gt;\n&lt;p 
 style=&quot;font-weight: 400\;&quot;&gt;&lt;strong&gt;ABSTRACT:&lt;/strong&gt;&amp;nbsp\;The success of
  deep Learning (or AI2.0) depends solely on Back-propagation (BP)\, a exte
 rnal learning paradigm\, whose supervision is exclusively accessed via the
  external interfacing nodes (i.e. input/output neurons). As such\, Deep Le
 arning has been limited to the parameter training of the neural nets (NNs)
 . The important task of designing optimal net structures has to resort to 
 trial and error. Therefore\, we shall design an Xnet which may be use to s
 imultaneously train the structure and parameters of the net. In addition\,
  it can facilitate Internal Neuron&#39;s Explainablility so as to fully suppor
 t DARPA&#39;s Explainable AI (i.e. XAI or AI3.0). Our internal learning paradi
 gm leads to an Explainable Neural Networks (Xnet) comprising (1) internal 
 teacher labels (ITL) and (2) internal optimization metrics (IOM). X-learni
 ng allows us to effectively rank the internal neurons (hidden nodes) and t
 hus sets the footing for the notion of structural gradient and structural 
 learning.&lt;/p&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;Pursuant to our simulation st
 udies\, Xnet can simultaneously compress the structure and raise the accur
 acy. There is evidence supporting that it may outperform many popular prun
 ing/compression methods. Most importantly\, X-learning opens up promising 
 research fronts on (1) explainable learning models for XAI and (2) machine
 -to-machine mutual learning which will become appealing in the 5G era&lt;/p&gt;\
 n&lt;p style=&quot;font-weight: 400\;&quot;&gt;&lt;strong&gt;BIO:&lt;/strong&gt;&amp;nbsp\;S.Y. Kung\, Lif
 e Fellow of IEEE\, is a Professor at Department of Electrical Engineering 
 in Princeton University. His research areas include multimedia information
  processing\, machine learning\, systematic design of deep learning networ
 ks\, VLSI array processors\, and compressive privacy. He was a founding me
 mber of several Technical Committees (TC) of the IEEE Signal Processing So
 ciety. He was elected to Fellow in 1988 and served as a Member of the Boar
 d of Governors of the IEEE Signal Processing Society (1989-1991). He was a
  recipient of IEEE Signal Processing Society&#39;s Technical Achievement Award
  for the contributions on &quot;parallel processing and neural network algorith
 ms for signal processing&quot; (1992)\; a Distinguished Lecturer of IEEE Signal
  Processing Society (1994)\; a recipient of IEEE Signal Processing Society
 &#39;s Best Paper Award\; and a recipient of the IEEE Third Millennium Medal (
 2000). Since 1990\, he has been the Editor-In-Chief of the Journal of VLSI
  Signal Processing Systems. He has authored and co-authored more than 500 
 technical publications and numerous textbooks including ``VLSI Array Proce
 ssors&#39;&#39;\, Prentice-Hall (1988)\; ``Digital Neural Networks&#39;&#39;\, Prentice-Ha
 ll (1993) \; ``Principal Component Neural Networks&#39;&#39;\, John-Wiley (1996)\;
  ``Biometric Authentication: A Machine Learning Approach&#39;&#39;\, Prentice-Hall
  (2004)\; and ``Kernel Methods and Machine Learning&amp;rdquo\;\, Cambridge Un
 iversity Press (2014).&lt;/p&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;&lt;strong&gt;2:15 - 3
 :00 PM Pete Warden (Google)&lt;/strong&gt;&lt;/p&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;&lt;s
 trong&gt;TITLE:&amp;nbsp\;&lt;/strong&gt;&lt;strong&gt;&lt;br /&gt;ABSTRACT:&amp;nbsp\;&lt;/strong&gt;&lt;/p&gt;\n&lt;
 p style=&quot;font-weight: 400\;&quot;&gt;&lt;strong&gt;BIO:&lt;/strong&gt;&amp;nbsp\;&lt;/p&gt;\n&lt;p style=&quot;f
 ont-weight: 400\;&quot;&gt;&lt;strong&gt;3:30 - 4:15 PM TBD&lt;/strong&gt;&lt;/p&gt;\n&lt;p style=&quot;font
 -weight: 400\;&quot;&gt;&lt;strong&gt;TITLE:&lt;/strong&gt;&lt;/p&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;
 &gt;&lt;strong&gt;ABSTRACT:&lt;/strong&gt;&lt;/p&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;&lt;strong&gt;BIO
 :&lt;/strong&gt;&amp;nbsp\;&lt;/p&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;&lt;strong&gt;4:15 - 5:00 P
 M TBD&lt;/strong&gt;&lt;/p&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;&lt;strong&gt;TITLE:&lt;/strong&gt;&lt;
 /p&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;&lt;strong&gt;ABSTRACT:&lt;/strong&gt;&lt;/p&gt;\n&lt;p styl
 e=&quot;font-weight: 400\;&quot;&gt;&lt;strong&gt;BIO:&lt;/strong&gt;&lt;/p&gt;&lt;br /&gt;&lt;br /&gt;Agenda: &lt;br /&gt;
 &lt;h2 style=&quot;font-weight: 600\;&quot;&gt;&lt;strong&gt;CASS-SCV Artificial Intelligence fo
 r Industry (AI4I) Forum - Fall 2019&lt;/strong&gt;&lt;/h2&gt;\n&lt;p style=&quot;font-weight: 
 400\;&quot;&gt;Event sponsored and organized by:&lt;/p&gt;\n&lt;p style=&quot;font-weight: 400\;
 &quot;&gt;&lt;a href=&quot;https://www.ieee-cas.org/&quot;&gt;IEEE Circuits and Systems Society (C
 ASS)&lt;/a&gt;&lt;/p&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;Co-sponsors:&lt;/p&gt;\n&lt;ul style=&quot;f
 ont-weight: 400\;&quot;&gt;\n&lt;li&gt;&lt;a href=&quot;http://sites.ieee.org/scv-cas/&quot;&gt;Circuits
  and Systems Society - Santa Clara Valley Chapter (CASS-SCV)&lt;/a&gt;&lt;/li&gt;\n&lt;li
 &gt;&lt;a href=&quot;http://computer.ieeesiliconvalley.org/&quot;&gt;Computer Society (CS)&lt;/a
 &gt;&lt;/li&gt;\n&lt;li&gt;&lt;a href=&quot;https://ieee-region6.org/scv-cis/&quot;&gt;Computational Inte
 lligence Society&amp;nbsp\;(CIS)&lt;/a&gt;&lt;/li&gt;\n&lt;li&gt;&lt;a href=&quot;http://sites.ieee.org/
 scv-sscs/upcoming-events/&quot;&gt;Solid-State Circuits Society(SSCS)&lt;/a&gt;&lt;/li&gt;\n&lt;l
 i&gt;&lt;a href=&quot;https://ewh.ieee.org/r6/scv/sps/&quot;&gt;Signal Processing Society(SPS
 )&lt;/a&gt;&lt;/li&gt;\n&lt;li&gt;&lt;a href=&quot;https://www.meetup.com/IEEE-ComSoc-SCV/&quot;&gt;Communic
 ation Society (ComSoC)&lt;/a&gt;&lt;/li&gt;\n&lt;/ul&gt;\n&lt;h2 style=&quot;font-weight: 600\;&quot;&gt;DAT
 E &amp;amp\; TIME:&lt;/h2&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;Friday\, September 6th\
 , 2019. 1 PM - 5 PM&lt;/p&gt;\n&lt;h2 style=&quot;font-weight: 600\;&quot;&gt;PROGRAM:&lt;/h2&gt;\n&lt;p 
 style=&quot;font-weight: 400\;&quot;&gt;1:00 - 1:30 PM Check-in / Networking &amp;amp\; Ref
 reshments&lt;/p&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;1:30 - 2:15 PM Prof.&amp;nbsp\;S.
 Y. Kung (Princeton)&lt;/p&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;2:15 - 3:00 PM Pete
  Warden&amp;nbsp\;(Google)&lt;/p&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;3:30 - 4:15 PM T
 BD&lt;/p&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;4:15 - 5:00 PM TBD&lt;/p&gt;\n&lt;p style=&quot;fo
 nt-weight: 400\;&quot;&gt;5:00 PM Adjourn&lt;/p&gt;\n&lt;h2 style=&quot;font-weight: 600\;&quot;&gt;LOCA
 TION:&lt;/h2&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;Intel SC-9 Auditorium&lt;/p&gt;\n&lt;p st
 yle=&quot;font-weight: 400\;&quot;&gt;2191 Laurelwood Rd\, Santa Clara\, CA 95054 (Nort
 hwest corner of 101 &amp;amp\; Montague Expwy)&lt;/p&gt;\n&lt;h2 style=&quot;font-weight: 60
 0\;&quot;&gt;AGENDA:&lt;/h2&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;&lt;strong&gt;1:30 - 2:15 PM Pr
 of.&amp;nbsp\;S.Y. Kung (Princeton)&lt;/strong&gt;&lt;/p&gt;\n&lt;p style=&quot;font-weight: 400\;
 &quot;&gt;&lt;strong&gt;TITLE:&lt;/strong&gt;&amp;nbsp\;From Deep Learning to X-Learning: An Inter
 nal and Explainable Learning for XAI&lt;/p&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;&lt;s
 trong&gt;ABSTRACT:&lt;/strong&gt;&amp;nbsp\;The success of deep Learning (or AI2.0) dep
 ends solely on Back-propagation (BP)\, a external learning paradigm\, whos
 e supervision is exclusively accessed via the external interfacing nodes (
 i.e. input/output neurons). As such\, Deep Learning has been limited to th
 e parameter training of the neural nets (NNs). The important task of desig
 ning optimal net structures has to resort to trial and error. Therefore\, 
 we shall design an Xnet which may be use to simultaneously train the struc
 ture and parameters of the net. In addition\, it can facilitate Internal N
 euron&#39;s Explainablility so as to fully support DARPA&#39;s Explainable AI (i.e
 . XAI or AI3.0). Our internal learning paradigm leads to an Explainable Ne
 ural Networks (Xnet) comprising (1) internal teacher labels (ITL) and (2) 
 internal optimization metrics (IOM). X-learning allows us to effectively r
 ank the internal neurons (hidden nodes) and thus sets the footing for the 
 notion of structural gradient and structural learning.&lt;/p&gt;\n&lt;p style=&quot;font
 -weight: 400\;&quot;&gt;Pursuant to our simulation studies\, Xnet can simultaneous
 ly compress the structure and raise the accuracy. There is evidence suppor
 ting that it may outperform many popular pruning/compression methods. Most
  importantly\, X-learning opens up promising research fronts on (1) explai
 nable learning models for XAI and (2) machine-to-machine mutual learning w
 hich will become appealing in the 5G era&lt;/p&gt;\n&lt;p style=&quot;font-weight: 400\;
 &quot;&gt;&lt;strong&gt;BIO:&lt;/strong&gt;&amp;nbsp\;S.Y. Kung\, Life Fellow of IEEE\, is a Profe
 ssor at Department of Electrical Engineering in Princeton University. His 
 research areas include multimedia information processing\, machine learnin
 g\, systematic design of deep learning networks\, VLSI array processors\, 
 and compressive privacy. He was a founding member of several Technical Com
 mittees (TC) of the IEEE Signal Processing Society. He was elected to Fell
 ow in 1988 and served as a Member of the Board of Governors of the IEEE Si
 gnal Processing Society (1989-1991). He was a recipient of IEEE Signal Pro
 cessing Society&#39;s Technical Achievement Award for the contributions on &quot;pa
 rallel processing and neural network algorithms for signal processing&quot; (19
 92)\; a Distinguished Lecturer of IEEE Signal Processing Society (1994)\; 
 a recipient of IEEE Signal Processing Society&#39;s Best Paper Award\; and a r
 ecipient of the IEEE Third Millennium Medal (2000). Since 1990\, he has be
 en the Editor-In-Chief of the Journal of VLSI Signal Processing Systems. H
 e has authored and co-authored more than 500 technical publications and nu
 merous textbooks including ``VLSI Array Processors&#39;&#39;\, Prentice-Hall (1988
 )\; ``Digital Neural Networks&#39;&#39;\, Prentice-Hall (1993) \; ``Principal Comp
 onent Neural Networks&#39;&#39;\, John-Wiley (1996)\; ``Biometric Authentication: 
 A Machine Learning Approach&#39;&#39;\, Prentice-Hall (2004)\; and ``Kernel Method
 s and Machine Learning&amp;rdquo\;\, Cambridge University Press (2014).&lt;/p&gt;\n&lt;
 p style=&quot;font-weight: 400\;&quot;&gt;&lt;strong&gt;2:15 - 3:00 PM Pete Warden (Google)&lt;/
 strong&gt;&lt;/p&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;&lt;strong&gt;TITLE:&amp;nbsp\;&lt;/strong&gt;&lt;
 strong&gt;&lt;br /&gt;ABSTRACT:&amp;nbsp\;&lt;/strong&gt;&lt;/p&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;
 &lt;strong&gt;BIO:&lt;/strong&gt;&amp;nbsp\;&lt;/p&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;&lt;strong&gt;3:
 30 - 4:15 PM TBD&lt;/strong&gt;&lt;/p&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;&lt;strong&gt;TITLE
 :&lt;/strong&gt;&lt;/p&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;&lt;strong&gt;ABSTRACT:&lt;/strong&gt;&lt;/
 p&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;&lt;strong&gt;BIO:&lt;/strong&gt;&amp;nbsp\;&lt;/p&gt;\n&lt;p sty
 le=&quot;font-weight: 400\;&quot;&gt;&lt;strong&gt;4:15 - 5:00 PM TBD&lt;/strong&gt;&lt;/p&gt;\n&lt;p style=
 &quot;font-weight: 400\;&quot;&gt;&lt;strong&gt;TITLE:&lt;/strong&gt;&lt;/p&gt;\n&lt;p style=&quot;font-weight: 4
 00\;&quot;&gt;&lt;strong&gt;ABSTRACT:&lt;/strong&gt;&lt;/p&gt;\n&lt;p style=&quot;font-weight: 400\;&quot;&gt;&lt;stron
 g&gt;BIO:&lt;/strong&gt;&lt;/p&gt;
END:VEVENT
END:VCALENDAR

