BEGIN:VCALENDAR VERSION:2.0 PRODID:IEEE vTools.Events//EN CALSCALE:GREGORIAN BEGIN:VTIMEZONE TZID:Europe/Zurich BEGIN:DAYLIGHT DTSTART:20190331T030000 TZOFFSETFROM:+0100 TZOFFSETTO:+0200 RRULE:FREQ=YEARLY;BYDAY=-1SU;BYMONTH=3 TZNAME:CEST END:DAYLIGHT BEGIN:STANDARD DTSTART:20191027T020000 TZOFFSETFROM:+0200 TZOFFSETTO:+0100 RRULE:FREQ=YEARLY;BYDAY=-1SU;BYMONTH=10 TZNAME:CET END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20191010T073501Z UID:A3CD4960-1840-4652-B32F-3AC1998BC542 DTSTART;TZID=Europe/Zurich:20191009T103000 DTEND;TZID=Europe/Zurich:20191009T113000 DESCRIPTION:Although signal and power integrity practices are as old as the digital design itself\, unlike SI\, PI still remains an elusive concept i n the eyes of industrial circles. One reason is the cause-and-effect relat ion in PI analysis hasn’t been firmly established in practical applicati ons. For example\, with SI analysis\, a logic failure can be traced to a n oise threshold violation. PI analysis\, on the other hand\, hardly points out to a smoking gun with the same rigor. Starting from a qualitative and descriptive introduction of power noise fundamentals\, the current analysi s techniques for printed circuit structures will be reviewed and their lim itations will be discussed with practical workarounds. Some recent develop ments including a novel interpretation of the effective radius of a decoup ling capacitor and multipin optimization of capacitors will be presented o n sample cases.\n\nCo-sponsored by: EMC Laboratory - EPFL\n\nSpeaker(s): D r. Ihsan Erdin\, \n\nRoom: 116\, Bldg: ELL\, EPFL\, Lausanne\, Switzerland \, Switzerland\, 1015 LOCATION:Room: 116\, Bldg: ELL\, EPFL\, Lausanne\, Switzerland\, Switzerlan d\, 1015 ORGANIZER:nicolas.mora@epfl.ch SEQUENCE:3 SUMMARY:Fundamentals and Recent Advances in Power Integrity URL;VALUE=URI:https://events.vtools.ieee.org/m/204307 X-ALT-DESC:Description: <br /><p>Although signal and power integrity practi ces are as old as the digital design itself\, unlike SI\, PI still remains an elusive concept in the eyes of industrial circles. One reason is the c ause-and-effect relation in PI analysis hasn&rsquo\;t been firmly establis hed in practical applications. For example\, with SI analysis\, a logic fa ilure can be traced to a noise threshold violation. PI analysis\, on the o ther hand\, hardly points out to a smoking gun with the same rigor. Starti ng from a qualitative and descriptive introduction of power noise fundamen tals\, the current analysis techniques for printed circuit structures will be reviewed and their limitations will be discussed with practical workar ounds. Some recent developments including a novel interpretation of the ef fective radius of a decoupling capacitor and multipin optimization of capa citors will be presented on sample cases.</p> END:VEVENT END:VCALENDAR