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DTSTART:20190331T030000
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DTSTART:20191027T020000
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DTSTAMP:20191024T155855Z
UID:87C1EBAB-53CB-452E-A003-0E9BF79E51AF
DTSTART;TZID=Europe/Zurich:20191002T183000
DTEND;TZID=Europe/Zurich:20191002T193000
DESCRIPTION:Non volatile memory is not only the ubiquitous storage medium i
 n consumer applications but has also started to appear in enterprise stora
 ge systems as well.\n\nFlash technology made it possible to store multiple
  bits in the same silicon area\, thus reducing the cost per amount of data
  stored. However\, at current sub-20nm technology nodes\, flash devices fa
 il to provide the levels of raw reliability\, mainly cycling endurance\, t
 hat are required by typical enterprise applications.\n\nAdvanced signal pr
 ocessing and coding schemes are needed to improve the flash bit error rate
  and thus elevate the device reliability to the desired level. In this art
 icle\, we report on the use of adaptive voltage thresholds and cell-to-cel
 l interference cancellation in the read operation of NAND flash devices.\n
 \nFields of research touch each other and overlap. Innovative material and
  devices such as Phase Change memory PCM has already seen 10-15 years of i
 ntense research\, and recently advanced development in the labs of most me
 mory manufacturers.\n\nWhile these alternative technologies are mostly sti
 ll in the basic research stage. In terms of characteristics\, memristors a
 re thought to be an eventual replacement for Flash memory due to their pot
 entially better scalability and performance. However\, their limited capab
 ility for multi-level cell storage might limit their price competitiveness
  in cost per gigabyte.\n\nThis seminar discuss on the Circuits and Device 
 implications for Reliable Flash and Phase Change Memory.\n\nSpeaker(s): Ha
 ris Pozidis \, \n\nRoom: MC B1 273\, Bldg: Microcity\, EPFL\, 71\, Rue de 
 la Maladière\, Neuchatel\, Switzerland\, Switzerland\, CH-2000
LOCATION:Room: MC B1 273\, Bldg: Microcity\, EPFL\, 71\, Rue de la Maladiè
 re\, Neuchatel\, Switzerland\, Switzerland\, CH-2000
ORGANIZER:mathieu.coustans@gmail.com
SEQUENCE:3
SUMMARY:IEEE Swiss SSC Talks : Circuit and Device implications for Reliable
  Flash and Phase Change Memory
URL;VALUE=URI:https://events.vtools.ieee.org/m/204456
X-ALT-DESC:Description: &lt;br /&gt;&lt;p&gt;Non volatile memory is not only the ubiqui
 tous storage medium in consumer applications but has also started to appea
 r in enterprise storage systems as well.&lt;/p&gt;\n&lt;p&gt;Flash technology made it 
 possible to store multiple bits in the same silicon area\, thus reducing t
 he cost per amount of data stored. However\, at current sub-20nm technolog
 y nodes\, flash devices fail to provide the levels of raw reliability\, ma
 inly cycling endurance\, that are required by typical enterprise applicati
 ons.&lt;/p&gt;\n&lt;p&gt;Advanced signal processing and coding schemes are needed to i
 mprove the flash bit error rate and thus elevate the device reliability to
  the desired level. In this article\, we report on the use of adaptive vol
 tage thresholds and cell-to-cell interference cancellation in the read ope
 ration of NAND flash devices.&lt;/p&gt;\n&lt;p&gt;Fields of research touch each other 
 and overlap. Innovative material and devices such as Phase Change memory P
 CM has already seen 10-15 years of intense research\, and recently advance
 d development in the labs of most memory manufacturers.&lt;/p&gt;\n&lt;p&gt;While thes
 e alternative technologies are mostly still in the basic research stage. I
 n terms of characteristics\, memristors are thought to be an eventual repl
 acement for Flash memory due to their potentially better scalability and p
 erformance. However\, their limited capability for multi-level cell storag
 e might limit their price competitiveness in cost per gigabyte.&lt;/p&gt;\n&lt;p&gt;Th
 is seminar discuss on the Circuits and Device implications for Reliable Fl
 ash and Phase Change Memory.&lt;/p&gt;
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