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DTSTAMP:20201030T174844Z
UID:4D417307-9538-467B-AFCD-C0B61D3D6466
DTSTART;TZID=US/Pacific:20191115T100000
DTEND;TZID=US/Pacific:20191115T113000
DESCRIPTION:Prof. Sorin Voinigescu\nUniversity of Toronto\nDepartment of El
 ectrical and Computer Engineering\nToronto\, Ontario\, Canada\n\nAbstract:
  This presentation will discuss the fundamental concepts and the feasibili
 ty of high-temperature (2-4 K) Si and SiGe electron/hole-spin qubits and q
 ubit integrated circuits (ICs) in commercial 22nm FDSOI CMOS technology\,.
  The beneficial aspects of the SiGe channel hole-spin qubit will be emphas
 ized in comparison with its silicon-only electron-spin counterpart. It is 
 also shown that\, at 2 K\, MOSFETs and cascodes can be operated as quantum
  dots in the subthreshold region\, while behaving as classical MOSFETs and
  cascodes in the saturation region\, suitable for qubits and mm-wave mixed
 -signal processing circuits\, respectively. Challenges in the design and t
 esting of quantum processor units monolithically integrated with readout a
 nd mm-wave spin control electronics in commercial 22nm FDSOI CMOS technolo
 gy\, will also be covered. Finally\, I will present measurements for full 
 technology characterization at cryogenic temperatures up to 67 GHz.\n\nSpe
 aker Bio: Sorin P. Voinigescu is a Professor in the Electrical and Compute
 r Engineering Department at the University of Toronto where he holds the S
 tanley Ho Chair in Microelectronics and is the Director of the VLSI Resear
 ch Group. He is an IEEE Fellow and an expert on millimeter-wave and 100+Gb
 /s integrated circuits and atomic-scale semiconductor device technologies.
  He obtained his PhD degree in Electrical and Computer Engineering from th
 e University of Toronto in 1994 and his M.Sc Degree in Electronics and Tel
 ecommunications from the Politechnical Institute of Bucharest in 1984.\n\n
 Speaker(s): Sorin Voinigescu\, \n\nAgenda: \n10:00-10:30 AM Arrival &amp; Netw
 orking\n10:15-11:30 AM Talk\, followed by Q&amp;A\n\nBldg: OC Plaza\, 2575 McC
 abe Way\, Irvine \, California\, United States\, 92614
LOCATION:Bldg: OC Plaza\, 2575 McCabe Way\, Irvine \, California\, United S
 tates\, 92614
ORGANIZER:info@nanomems-research.com
SEQUENCE:1
SUMMARY:Towards monolithic quantum computing processors in production FDSOI
  CMOS technology
URL;VALUE=URI:https://events.vtools.ieee.org/m/206488
X-ALT-DESC:Description: &lt;br /&gt;&lt;p&gt;&amp;nbsp\;&lt;/p&gt;\n&lt;p&gt;&lt;strong&gt;Prof. Sorin Voinig
 escu&lt;/strong&gt;&lt;br /&gt;University of Toronto&lt;br /&gt;Department of Electrical and
  Computer Engineering&lt;br /&gt;Toronto\, Ontario\, Canada&lt;/p&gt;\n&lt;p&gt;&lt;strong&gt;Abst
 ract:&lt;/strong&gt; This presentation will discuss the fundamental concepts and
  the feasibility of high-temperature (2-4 K) Si and&amp;nbsp\;SiGe electron/ho
 le-spin qubits and qubit integrated circuits (ICs) in commercial 22nm FDSO
 I CMOS technology\,. The&amp;nbsp\;beneficial aspects of the SiGe channel hole
 -spin qubit will be emphasized in comparison with its silicon-only electro
 n-spin&amp;nbsp\;counterpart. It is also shown that\, at 2 K\, MOSFETs and cas
 codes can be operated as quantum dots in the subthreshold region\,&amp;nbsp\;w
 hile behaving as classical MOSFETs and cascodes in the saturation region\,
  suitable for qubits and mm-wave mixed-signal&amp;nbsp\;processing circuits\, 
 respectively. Challenges in the design and testing of quantum processor un
 its monolithically integrated&amp;nbsp\;with readout and mm-wave spin control 
 electronics in commercial 22nm FDSOI CMOS technology\, will also be covere
 d.&amp;nbsp\;Finally\, I will present measurements for full technology charact
 erization at cryogenic temperatures up to 67 GHz.&lt;/p&gt;\n&lt;p&gt;&lt;strong&gt;Speaker 
 Bio&lt;/strong&gt;: Sorin P. Voinigescu is a Professor in the Electrical and Com
 puter Engineering Department at the University of&amp;nbsp\;Toronto where he h
 olds the Stanley Ho Chair in Microelectronics and is the Director of the V
 LSI Research Group. He is an&amp;nbsp\;IEEE Fellow and an expert on millimeter
 -wave and 100+Gb/s integrated circuits and atomic-scale semiconductor devi
 ce&amp;nbsp\;technologies. He obtained his PhD degree in Electrical and Comput
 er Engineering from the University of Toronto in 1994 and&amp;nbsp\;his M.Sc D
 egree in Electronics and Telecommunications from the Politechnical Institu
 te of Bucharest in 1984.&amp;nbsp\;&lt;/p&gt;&lt;br /&gt;&lt;br /&gt;Agenda: &lt;br /&gt;&lt;p&gt;10:00-10:3
 0 AM Arrival &amp;amp\; Networking&lt;br /&gt;10:15-11:30 AM Talk\, followed by Q&amp;am
 p\;A&lt;/p&gt;
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