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PRODID:IEEE vTools.Events//EN
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TZID:Asia/Dili
BEGIN:DAYLIGHT
DTSTART:20380119T121407
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DTSTART:20000917T010000
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BEGIN:VEVENT
DTSTAMP:20191125T144129Z
UID:36B87FE2-373D-4E2C-A9AF-EB4D283F860C
DTSTART;TZID=Asia/Dili:20190906T090000
DTEND;TZID=Asia/Dili:20190906T153000
DESCRIPTION:The student branch of IEEE IGDTUW along with IEEE-Electron Devi
 ce Society and IEEE Delhi Chapter jointly hosted the Seminar on “Trends 
 and Challenges in Microelectronics and VLSI Design” on 6th September’1
 9. The goal of the colloquium was to expose the interested students about 
 the challenges and the scope of work in the field and give them insights b
 eyond their existing academic knowledge. Topic covered &quot;Fundamental Insigh
 ts into Channel and Gate Engineered Double Gate Junction-Less Transistor f
 or Low-Voltage Low-Power Analog and Digital Circuits&quot;\, &quot;Spintronics-Persp
 ectives and Challenges&quot; and &quot;The Future of World Electronics and Possible 
 Roles India Can Play&quot;. The event recorded around 300+ registrations from a
 ll across colleges in Delhi NCR and a footfall of more than 150 at the eve
 nt. The demographics was diverse with both post-graduates and graduates fr
 om wide-ranging courses being the active audience of the day.\n\nSpeaker(s
 ): Dr. Brajesh Kumar Kaushik\, Dr Mayank Shivastava\n\nRoom: Conference Ro
 om\, Bldg: Administartive Block\, Indira Gandhi Delhi Technical University
  for Women\, Kashmere Gate\, New Delhi\, Delhi\, India\, 110006
LOCATION:Room: Conference Room\, Bldg: Administartive Block\, Indira Gandhi
  Delhi Technical University for Women\, Kashmere Gate\, New Delhi\, Delhi\
 , India\, 110006
ORGANIZER:snehakabra1@gmail.com
SEQUENCE:0
SUMMARY:Seminar on “Trends and Challenges in Microelectronics and VLSI De
 sign”
URL;VALUE=URI:https://events.vtools.ieee.org/m/212053
X-ALT-DESC:Description: &lt;br /&gt;&lt;p&gt;The student branch of IEEE IGDTUW along wi
 th IEEE-Electron Device Society and IEEE Delhi Chapter jointly hosted the 
 Seminar on &amp;ldquo\;Trends and Challenges in Microelectronics and VLSI Desi
 gn&amp;rdquo\; on 6th September&amp;rsquo\;19. The goal of the colloquium was to e
 xpose the interested students about the challenges and the scope of work i
 n the field and give them insights beyond their existing academic knowledg
 e. Topic covered &quot;Fundamental Insights into Channel and Gate Engineered Do
 uble Gate Junction-Less Transistor for Low-Voltage Low-Power Analog and Di
 gital Circuits&quot;\, &quot;Spintronics-Perspectives and Challenges&quot; and &quot;The Futur
 e of World Electronics and Possible Roles India Can Play&quot;. The event recor
 ded around 300+ registrations from all across colleges in Delhi NCR and a 
 footfall of more than 150 at the event. The demographics was diverse with 
 both post-graduates and graduates from wide-ranging courses being the acti
 ve audience of the day.&lt;/p&gt;
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