BEGIN:VCALENDAR
VERSION:2.0
PRODID:IEEE vTools.Events//EN
CALSCALE:GREGORIAN
BEGIN:VTIMEZONE
TZID:US/Eastern
BEGIN:DAYLIGHT
DTSTART:20200308T030000
TZOFFSETFROM:-0500
TZOFFSETTO:-0400
RRULE:FREQ=YEARLY;BYDAY=2SU;BYMONTH=3
TZNAME:EDT
END:DAYLIGHT
BEGIN:STANDARD
DTSTART:20191103T010000
TZOFFSETFROM:-0400
TZOFFSETTO:-0500
RRULE:FREQ=YEARLY;BYDAY=1SU;BYMONTH=11
TZNAME:EST
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20200228T213901Z
UID:6B8D4442-9AF9-4C55-8CDB-3C940F4EFB59
DTSTART;TZID=US/Eastern:20200226T130000
DTEND;TZID=US/Eastern:20200226T150000
DESCRIPTION:Speakers Jeff Wu and Pratik Shrestha presenting &quot;Machine Learni
 ng in Analog EDA&quot; &amp; &quot;State of the Art Logic Encryption&quot;\n\nRoom: 302\, Bld
 g: Bossone\, 3141 Chestnut Street\, Drexel University\, Philadelphia\, Pen
 nsylvania\, United States\, 19104
LOCATION:Room: 302\, Bldg: Bossone\, 3141 Chestnut Street\, Drexel Universi
 ty\, Philadelphia\, Pennsylvania\, United States\, 19104
ORGANIZER:taskin@coe.drexel.edu
SEQUENCE:1
SUMMARY:IEEE CEDA PA chapter - Computer Engineering Graduate Symposium Seri
 es
URL;VALUE=URI:https://events.vtools.ieee.org/m/218593
X-ALT-DESC:Description: &lt;br /&gt;&lt;p&gt;Speakers Jeff Wu and Pratik Shrestha prese
 nting &quot;Machine Learning in Analog EDA&quot; &amp;amp\; &quot;State of the Art Logic Encr
 yption&quot;&lt;/p&gt;
END:VEVENT
END:VCALENDAR

