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DTSTART:20200308T030000
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DTSTART:20201101T010000
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BEGIN:VEVENT
DTSTAMP:20200912T000928Z
UID:E03626BC-8D92-49B9-9159-A0879632529E
DTSTART;TZID=US/Pacific:20200914T073000
DTEND;TZID=US/Pacific:20200914T083000
DESCRIPTION:ABSTRACT: Advances in Deep Learning over the past several years
  have demonstrated two paths to better models: scale and algorithmic innov
 ation. Brute-force scaling of model parameter count increases model capaci
 ty\, and when presented with enough training data\, has shown better perfo
 rmance in many domains. But it requires more compute than can be delivered
  by a single traditional processor – clusters of 10s to even 1000s of ge
 neral purpose processors are commonly used today for neural network traini
 ng. This approach to scaling is not sustainable. We need algorithmic innov
 ations to find more efficient neural network architectures and training me
 thods. This requires more flexible hardware to develop and test novel appr
 oaches. In this presentation\, we will look at the trends of recent deep l
 earning models\, discuss implications for hardware\, and share how the Cer
 ebras CS-1 addresses these requirements for both scale and flexibility of 
 compute.\n\nVirtual: https://events.vtools.ieee.org/m/239739
LOCATION:Virtual: https://events.vtools.ieee.org/m/239739
ORGANIZER:virbahu@ieee.org
SEQUENCE:1
SUMMARY:&quot;Path towards better deep learning models and implications for hard
 ware&quot;
URL;VALUE=URI:https://events.vtools.ieee.org/m/239739
X-ALT-DESC:Description: &lt;br /&gt;&lt;p&gt;ABSTRACT:&amp;nbsp\;Advances in Deep Learning 
 over the past several years have demonstrated two paths to better models: 
 scale and algorithmic innovation. Brute-force scaling of model parameter c
 ount increases model capacity\, and when presented with enough training da
 ta\, has shown better performance in many domains. But it requires more co
 mpute than can be delivered by a single traditional processor &amp;ndash\; clu
 sters of 10s to even 1000s of general purpose processors are commonly used
  today for neural network training. This approach to scaling is not sustai
 nable. We need algorithmic innovations to find more efficient neural netwo
 rk architectures and training methods. This requires more flexible hardwar
 e to develop and test novel approaches. In this presentation\, we will loo
 k at the trends of recent deep learning models\, discuss implications for 
 hardware\, and share how the Cerebras CS-1 addresses these requirements fo
 r both scale and flexibility of compute.&lt;/p&gt;
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