BEGIN:VCALENDAR
VERSION:2.0
PRODID:IEEE vTools.Events//EN
CALSCALE:GREGORIAN
BEGIN:VTIMEZONE
TZID:Asia/Kolkata
BEGIN:STANDARD
DTSTART:19451014T230000
TZOFFSETFROM:+0630
TZOFFSETTO:+0530
TZNAME:IST
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20200928T105037Z
UID:64F9A3B5-9474-402D-8404-099485704BC7
DTSTART;TZID=Asia/Kolkata:20200610T110000
DTEND;TZID=Asia/Kolkata:20200610T130000
DESCRIPTION:1. The session started off with a basic recap of previous sessi
 on and explanation of why the industry prefers digital design\, what are i
 ts advantages and disadvantages. She spoke about the intrusion of noise an
 d the advantages in terms of power consumption.\n\n2. Next\, the speaker m
 oved on to the explanation of the levels of abstraction included in digita
 l design\, and spoke about programs\, device drivers\, instruction registe
 rs\, datapaths controllers\, adders\, memories\, AND and NOT gates\, Ampli
 fiers\, Filters\, Transistors\, Diodes and the role of electrons.\n\n3. Th
 e number system was explained and different conversions were taught with t
 he help of examples and the importance of it was explained.\n\n4. Logic ga
 tes and their functions were taught in detail.\n\n5. Combinational circuit
 s like multipliers\, encoders\, decoders\, comparators and the minimisatio
 n using Karnaugh maps was explained.\n\n6. Last but not the least\, glitch
 es and timing diagrams were demonstrated. The meaning of delay\, set up an
 d hold time were explained in detail.\n\nSpeaker(s): Mrs G Sahithya\, \n\n
 Agenda: \nAfter the lecture on VLSI Recent Trends in the Industry\, a sess
 ion on the Fundamental Digital Logic Design was held on June 10th\, 2020.\
 n\nHyderabad\, Andhra Pradesh\, India
LOCATION:Hyderabad\, Andhra Pradesh\, India
ORGANIZER:tharunkumar@ieee.org
SEQUENCE:0
SUMMARY:Lecture on &quot;Advanced Digital Design-1&quot;
URL;VALUE=URI:https://events.vtools.ieee.org/m/241366
X-ALT-DESC:Description: &lt;br /&gt;&lt;p&gt;1. The session started off with a basic re
 cap of previous session and explanation of why the industry prefers digita
 l design\, what are its advantages and disadvantages. She spoke about the 
 intrusion of noise and the advantages in terms of power consumption.&lt;/p&gt;\n
 &lt;p&gt;2. Next\, the speaker moved on to the explanation of the levels of abst
 raction included in digital design\, and spoke about programs\, device dri
 vers\, instruction registers\, datapaths controllers\, adders\, memories\,
  AND and NOT gates\, Amplifiers\, Filters\, Transistors\, Diodes and the r
 ole of electrons.&lt;/p&gt;\n&lt;p&gt;3. The number system was explained and different
  conversions were taught with the help of examples and the importance of i
 t was explained.&lt;/p&gt;\n&lt;p&gt;4. Logic gates and their functions were taught in
  detail.&lt;/p&gt;\n&lt;p&gt;5. Combinational circuits like multipliers\, encoders\, d
 ecoders\, comparators and the minimisation using Karnaugh maps was explain
 ed.&lt;/p&gt;\n&lt;p&gt;6. Last but not the least\, glitches and timing diagrams were 
 demonstrated. The meaning of delay\, set up and hold time were explained i
 n detail.&lt;/p&gt;&lt;br /&gt;&lt;br /&gt;Agenda: &lt;br /&gt;&lt;p&gt;After the lecture on VLSI Recent
  Trends in the Industry\, a session on the Fundamental Digital Logic Desig
 n was held on June 10th\, 2020.&lt;/p&gt;
END:VEVENT
END:VCALENDAR

