BEGIN:VCALENDAR
VERSION:2.0
PRODID:IEEE vTools.Events//EN
CALSCALE:GREGORIAN
BEGIN:VTIMEZONE
TZID:Asia/Kolkata
BEGIN:STANDARD
DTSTART:19451014T230000
TZOFFSETFROM:+0630
TZOFFSETTO:+0530
TZNAME:IST
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20200930T112033Z
UID:70ABDF56-5D7B-4268-9151-2AF8192F5476
DTSTART;TZID=Asia/Kolkata:20200616T110000
DTEND;TZID=Asia/Kolkata:20200616T130000
DESCRIPTION:The session covered a vast range of topics which also included 
 the criteria an engineer looks for while designing a circuit and what are 
 the advantages of one type over other. The difference between ASSP\, ASIC 
 and FPGA was explained.\n\nThe working of Programmable Logic Devices (PLD)
  was explained along with a few examples like MAX7000 CPLD.\n\nCPLD and it
 s applications in optical encoders\, bus protocol translation\, memory con
 trollers\, data acquisition control was explained.\n\nThe structure of Loo
 k-up tables (LUTs) along with examples were explained and programming tech
 nologies like fuse and anti-fuse was explained.\n\nSpeaker(s): Mr K Sarath
  Chandra\, \n\nAgenda: \nThis lecture was organised in order to tell the d
 ifferences between different ICs and their classification such as CPLD\, P
 LD and FPGA.\n\nHyderabad\, Andhra Pradesh\, India
LOCATION:Hyderabad\, Andhra Pradesh\, India
ORGANIZER:tharunkumar@ieee.org
SEQUENCE:0
SUMMARY:Lecture on &quot;Classification of IC Design&quot;
URL;VALUE=URI:https://events.vtools.ieee.org/m/241643
X-ALT-DESC:Description: &lt;br /&gt;&lt;p&gt;The session covered a vast range of topics
  which also included the criteria an engineer looks for while designing a 
 circuit and what are the advantages of one type over other. The difference
  between ASSP\, ASIC and FPGA was explained.&lt;/p&gt;\n&lt;p&gt;The working of Progra
 mmable Logic Devices (PLD) was explained along with a few examples like MA
 X7000 CPLD.&lt;/p&gt;\n&lt;p&gt;CPLD and its applications in optical encoders\, bus pr
 otocol translation\, memory controllers\, data acquisition control was exp
 lained.&lt;/p&gt;\n&lt;p&gt;The structure of Look-up tables (LUTs) along with examples
  were explained and programming technologies like fuse and anti-fuse was e
 xplained.&lt;/p&gt;\n&lt;p&gt;&amp;nbsp\;&lt;/p&gt;&lt;br /&gt;&lt;br /&gt;Agenda: &lt;br /&gt;&lt;p&gt;This lecture was
  organised in order to tell the differences between different ICs and thei
 r classification such as CPLD\, PLD and FPGA.&lt;/p&gt;
END:VEVENT
END:VCALENDAR