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DTSTAMP:20201119T041240Z
UID:F0EB6C70-1C3F-4C11-8073-B2FFA56395C5
DTSTART;TZID=US/Eastern:20201020T190000
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DESCRIPTION:The data transmission speeds of telecommunication/networking eq
 uipment\, its copper and optical I/O interface densities\, and its system 
 power requirements continue to increase. Each of these attributes presents
  its own sets of EMC challenges\, in both design and test for immunity and
  emissions. This presentation provides an overview of each of these challe
 nges and how they are being mitigated. The talk will cover design and veri
 fication methodologies at a component level (e.g. power supply\, Integrate
 d Connector Module (ICM) and/or Optical Module) as well as the system leve
 l.\n\nSpeaker(s): Alpesh Bhobe\, \n\nAgenda: \nDesign and test for immunit
 y and emissions. This presentation provides an overview of each of these c
 hallenges and how they are being mitigated. The talk will cover design and
  verification methodologies at a component level (e.g. power supply\, Inte
 grated Connector Module (ICM) and/or Optical Module) as well as the system
  level.\n\nVirtual: https://events.vtools.ieee.org/m/244442
LOCATION:Virtual: https://events.vtools.ieee.org/m/244442
ORGANIZER:j.c.diepenbrock@ieee.org
SEQUENCE:1
SUMMARY:EMC Design and Test Challenges in Telecom Equipment
URL;VALUE=URI:https://events.vtools.ieee.org/m/244442
X-ALT-DESC:Description: <br /><p>The data transmission speeds of telecommun
 ication/networking equipment\, its copper and optical I/O interface densit
 ies\, and its system power requirements continue to increase. Each of thes
 e attributes presents its own sets of EMC challenges\, in both design and 
 test for immunity and emissions. This presentation provides an overview of
  each of these challenges and how they are being mitigated. The talk will 
 cover design and verification methodologies at a component level (e.g. pow
 er supply\, Integrated Connector Module (ICM) and/or Optical Module) as we
 ll as the system level.</p><br /><br />Agenda: <br /><p>Design and test fo
 r immunity and emissions. This presentation provides an overview of each o
 f these challenges and how they are being mitigated. The talk will cover d
 esign and verification methodologies at a component level (e.g. power supp
 ly\, Integrated Connector Module (ICM) and/or Optical Module) as well as t
 he system level.</p>
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