BEGIN:VCALENDAR
VERSION:2.0
PRODID:IEEE vTools.Events//EN
CALSCALE:GREGORIAN
BEGIN:VTIMEZONE
TZID:Europe/Zurich
BEGIN:DAYLIGHT
DTSTART:20210328T030000
TZOFFSETFROM:+0100
TZOFFSETTO:+0200
RRULE:FREQ=YEARLY;BYDAY=-1SU;BYMONTH=3
TZNAME:CEST
END:DAYLIGHT
BEGIN:STANDARD
DTSTART:20201025T020000
TZOFFSETFROM:+0200
TZOFFSETTO:+0100
RRULE:FREQ=YEARLY;BYDAY=-1SU;BYMONTH=10
TZNAME:CET
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20201219T182822Z
UID:06BD8773-2FBF-4049-832E-64EA7E0F1D04
DTSTART;TZID=Europe/Zurich:20201126T180000
DTEND;TZID=Europe/Zurich:20201126T184500
DESCRIPTION:Dear Members\,\n\nWe hope all of you are doing well and healthy
 .\n\nOur Swiss Solid State Circuit Society is please to host Phd Student U
 pdate.\n\nIt&#39;s a program that aims to give the floor to local university s
 tudents to present their work.\n\nThat work has been peer-reviewed and acc
 epted in one of the main conferences of the SSC or CAS Society and has to 
 do with circuits.\n\nWe think it is beneficial for &gt;\n1. Students can eith
 er have a mock presentation or try to engage locally and have more feedbac
 k.\n2. Professional who gets aware of research done in Federal institutes 
 or Engineering School.\n3. Professor who may have interest to see what oth
 er labs are doing.\n\nWe start on November 26th with a Low power timer pre
 sented by Jiawei Liao\, Doctoral Student at the at the Institute for Integ
 rated Systems at the ETH Zürich.\n\nThe paper is going to be presented at
  VLSI2020 &gt;\n\nA 8.7ppm/°C\, 694nW\, One-​Point Calibrated RC Oscillato
 r using a Nonlinearity-​Aware Dual Phase-​Locked Loop and DSM-​Contr
 olled Frequency-​Locked Loops\n\nThe video conferencing link will be pro
 vided on the day.\n\nPlease Join at 18:00 mute your headset or microphone.
 \n\nWe make a group picture in the begining for society report.\n\nFor the
  Q&amp;A make sure to have your headset or a proper microphone.\n\nThe Agenda 
 is as follow:\n\n18:00 - 18:05 Welcome participants Teleconference set-up\
 n\n18:05 - 18:25 Lecture By Jiawei Liao\n\n18:25 - 18:40 Questions / Discu
 ssion\n\nWe look forward meeting you and having fruitful discussion.\n\nKi
 nd regards\,\n\nMathieu Coustans for your IEEE Switzerland Solid State Cir
 cuit Society committee.\n\nSpeaker(s): Jiawei Liao\, \n\nzurich\, Switzerl
 and\, Switzerland\, Virtual: https://events.vtools.ieee.org/m/247516
LOCATION:zurich\, Switzerland\, Switzerland\, Virtual: https://events.vtool
 s.ieee.org/m/247516
ORGANIZER:mathieu.coutans@ieee.org
SEQUENCE:3
SUMMARY:IEEE SWISS SSC TALKS (WEBINAR) / PhD Student Update / Low Power Osc
 illators
URL;VALUE=URI:https://events.vtools.ieee.org/m/247516
X-ALT-DESC:Description: &lt;br /&gt;&lt;p&gt;Dear Members\,&lt;/p&gt;\n&lt;p&gt;We hope all of you 
 are doing well and healthy.&lt;/p&gt;\n&lt;p&gt;Our Swiss Solid State Circuit Society 
 is please to host Phd Student Update.&lt;/p&gt;\n&lt;p&gt;It&#39;s a program that aims to 
 give the floor to local university students to present their work.&lt;/p&gt;\n&lt;p
 &gt;That work has been peer-reviewed and accepted in one of the main conferen
 ces of the SSC or CAS Society and has to do with circuits.&lt;/p&gt;\n&lt;p&gt;We thin
 k it is beneficial for &amp;gt\;&lt;br /&gt;1. Students can either have a mock prese
 ntation or try to engage locally and have more feedback.&lt;br /&gt;2. Professio
 nal who gets aware of research done in Federal institutes or Engineering S
 chool.&lt;br /&gt;3. Professor who may have interest to see what other labs are 
 doing.&lt;/p&gt;\n&lt;p&gt;We start on November 26th with a Low power timer presented 
 by Jiawei Liao\, Doctoral Student at the at the Institute for Integrated S
 ystems at the ETH Z&amp;uuml\;rich.&lt;/p&gt;\n&lt;p&gt;The paper is going to be presented
  at VLSI2020 &amp;gt\;&lt;/p&gt;\n&lt;p&gt;A 8.7ppm/&amp;deg\;C\, 694nW\, One-​Point Calibra
 ted RC Oscillator using a Nonlinearity-​Aware Dual Phase-​Locked Loop 
 and DSM-​Controlled Frequency-​Locked Loops&lt;/p&gt;\n&lt;p&gt;The video conferen
 cing link will be provided on the day.&lt;/p&gt;\n&lt;p&gt;Please Join at 18:00 mute y
 our headset or microphone.&lt;/p&gt;\n&lt;p&gt;We make a group picture in the begining
  for society report.&lt;/p&gt;\n&lt;p&gt;For the Q&amp;amp\;A make sure to have your heads
 et or a proper microphone.&lt;/p&gt;\n&lt;p&gt;The Agenda is as follow:&lt;/p&gt;\n&lt;p&gt;18:00 
 - 18:05 Welcome participants Teleconference set-up&lt;/p&gt;\n&lt;p&gt;18:05 - 18:25 L
 ecture By Jiawei Liao&lt;/p&gt;\n&lt;p&gt;18:25 - 18:40 Questions / Discussion&lt;/p&gt;\n&lt;p
 &gt;We look forward meeting you and having fruitful discussion.&lt;/p&gt;\n&lt;p&gt;Kind 
 regards\,&lt;/p&gt;\n&lt;p&gt;Mathieu Coustans for your IEEE Switzerland Solid State C
 ircuit Society committee.&lt;/p&gt;
END:VEVENT
END:VCALENDAR