BEGIN:VCALENDAR VERSION:2.0 PRODID:IEEE vTools.Events//EN CALSCALE:GREGORIAN BEGIN:VTIMEZONE TZID:America/New_York BEGIN:DAYLIGHT DTSTART:20210314T030000 TZOFFSETFROM:-0500 TZOFFSETTO:-0400 RRULE:FREQ=YEARLY;BYDAY=2SU;BYMONTH=3 TZNAME:EDT END:DAYLIGHT BEGIN:STANDARD DTSTART:20201101T010000 TZOFFSETFROM:-0400 TZOFFSETTO:-0500 RRULE:FREQ=YEARLY;BYDAY=1SU;BYMONTH=11 TZNAME:EST END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20201218T025415Z UID:6DFB5380-635D-43BB-94A7-BD4AE71C577D DTSTART;TZID=America/New_York:20201216T190000 DTEND;TZID=America/New_York:20201216T203000 DESCRIPTION:Wide power-performance adaptation is becoming crucial in always -on nearly real-time and energy-autonomous integrated systems that are sub ject to wide variability in the power availability and the performance tar get. Adaptation is indeed a prerequisite to assure continuous operation in spite of the widely fluctuating energy/power source (e.g.\, energy harves ter)\, and to grant swift response upon the occurrence of events of intere st (e.g.\, on-chip data analytics)\, while maintaining extremely low consu mption in the common case. These requirements have led to the strong deman d of a new breed of integrated systems having an extremely wide performanc e-power scalability and adaptation\, beyond conventional voltage scaling o r adaptive parallelism. In this talk\, new techniques that drastically ext end the performance-power scalability of digital circuits and architecture s are presented. Silicon demonstrations of better-than-voltage-scaling ada ptation to the workload are illustrated for both the data path (i.e.\, mic roarchitecture) and the clock path. Adaptation to a very wide range of ene rgy/power availability is also discussed\, presenting demonstrations of al ways-on systems (e.g.\, microcontrollers\, power management units) with po wer down to sub-nW\, and duty-cycled operation down to pW range. Several s ilicon demonstrations are illustrated to quantify the benefits offered by wide power-performance adaptation\, and identify opportunities and challen ges for the decade ahead.\n\nVirtual: https://events.vtools.ieee.org/m/249 986 LOCATION:Virtual: https://events.vtools.ieee.org/m/249986 ORGANIZER:alvin.loke@alumni.stanford.edu SEQUENCE:1 SUMMARY:Circuits and Architectures for Computation with Ultra-Wide Power-Pe rformance Adaptation - Well Beyond Voltage Scaling URL;VALUE=URI:https://events.vtools.ieee.org/m/249986 X-ALT-DESC:Description: <br /><p>Wide power-performance adaptation is becom ing crucial in always-on nearly real-time and energy-autonomous integrated systems that are subject to wide variability in the power availability an d the performance target. Adaptation is indeed a prerequisite to assure co ntinuous operation in spite of the widely fluctuating energy/power source (e.g.\, energy harvester)\, and to grant swift response upon the occurrenc e of events of interest (e.g.\, on-chip data analytics)\, while maintainin g extremely low consumption in the common case. These requirements have le d to the strong demand of a new breed of integrated systems having an extr emely wide performance-power scalability and adaptation\, beyond conventio nal voltage scaling or adaptive parallelism. In this talk\, new techniques that drastically extend the performance-power scalability of digital circ uits and architectures are presented. Silicon demonstrations of better-tha n-voltage-scaling adaptation to the workload are illustrated for both the data path (i.e.\, microarchitecture) and the clock path. Adaptation to a v ery wide range of energy/power availability is also discussed\, presenting demonstrations of always-on systems (e.g.\, microcontrollers\, power mana gement units) with power down to sub-nW\, and duty-cycled operation down t o pW range. Several silicon demonstrations are illustrated to quantify the benefits offered by wide power-performance adaptation\, and identify oppo rtunities and challenges for the decade ahead.</p> END:VEVENT END:VCALENDAR