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PRODID:IEEE vTools.Events//EN
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DTSTART:20210314T030000
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DTSTAMP:20210617T234548Z
UID:1B5A18B3-FB8C-4449-881C-A53466571E56
DTSTART;TZID=US/Eastern:20210617T183000
DTEND;TZID=US/Eastern:20210617T193000
DESCRIPTION:Every storage cell on an IC fabricated at advanced technologies
  is susceptible to radiation-induced data errors\, known as single-event u
 psets or soft errors. Single-event upsets are the result of energy deposit
 ion by an energetic particle incident on a semiconductor region. Prolifera
 tion of electronic systems in everyday life has necessitated evaluation of
  single-event effects on storage cells to characterize failure rates of th
 ese systems. Out of all storage cells\, SRAM cells are most vulnerable to 
 single-event effects due to very low critical charge values. Improvements 
 in fabrication processes have resulted in a mixed bag of results. This tal
 k will examine the effects of strain engineering and FinFET physical shape
  on single-bit and multi-cell upsets for SRAM arrays.\n\nCo-sponsored by: 
 CH02099- Northern Virginia/Wash Jt Sections Chapter\, ED15\n\nSpeaker(s): 
 Prof. Bharat Bhuva\, \n\nVirtual: https://events.vtools.ieee.org/m/273329
LOCATION:Virtual: https://events.vtools.ieee.org/m/273329
ORGANIZER:hsauberman@ieee.org
SEQUENCE:6
SUMMARY:Radiation Induced Single-Event Effects for SRAMs at Advanced Techno
 logy Nodes
URL;VALUE=URI:https://events.vtools.ieee.org/m/273329
X-ALT-DESC:Description: <br /><p>Every storage cell on an IC fabricated at 
 advanced technologies is susceptible to radiation-induced data errors\, kn
 own as single-event upsets or soft errors. Single-event upsets are the res
 ult of energy deposition by an energetic particle incident on a semiconduc
 tor region. &nbsp\;Proliferation of electronic systems in everyday life ha
 s necessitated evaluation of single-event effects on storage cells&nbsp\;t
 o characterize failure rates of these systems. Out of all storage cells\, 
 SRAM cells are most vulnerable to single-event effects due to very low cri
 tical charge values.&nbsp\; Improvements in fabrication processes have res
 ulted in a mixed bag of results.&nbsp\; This talk will examine the effects
  of strain engineering and FinFET physical shape on single-bit and multi-c
 ell upsets for SRAM arrays.&nbsp\;</p>
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