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PRODID:IEEE vTools.Events//EN
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TZID:Asia/Shanghai
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DTSTART:19910915T010000
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TZOFFSETTO:+0800
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BEGIN:VEVENT
DTSTAMP:20210820T123944Z
UID:716F4193-251C-44F3-B04F-DC42C5109FD1
DTSTART;TZID=Asia/Shanghai:20210712T103000
DTEND;TZID=Asia/Shanghai:20210713T000000
DESCRIPTION:Recent advances in autonomous micro robots have changed the way
  humans live and work. Robots are now able to assist humans or even substi
 tute them in many applications. For autonomous navigation\, robots need to
  perceive the environment\, make decisions based on the information collec
 ted\, and autonomously take action. The sensed data are first analyzed to 
 create a map. In the cognition phase\, the actions of the robot need to be
  determined based on its objectives. The tasks include identifying a path\
 , from a given start and endpoint\, without colliding with any obstacles. 
 Then motion control commands are executed so as to guide the robots along 
 the safest path. To accelerate path planning\, GPUs have been proposed in 
 order to improve the performance. However\, GPU-based designs require hund
 reds of milliseconds to perform path planning and consume a considerable a
 mount of power\, which is not feasible for battery-powered micro robots. I
 n this talk\, I will present a path planning processor for 2-D/3-D autonom
 ous navigation. Energy and latency are minimized through algorithm-archite
 cture optimization. The chip achieves orders of magnitude improvement in b
 oth energy efficiency and latency over the state-of-the-art design.\n\nSpe
 aker(s): Chia-Hsiang  Yang\, \n\nVirtual: https://events.vtools.ieee.org/m
 /276766
LOCATION:Virtual: https://events.vtools.ieee.org/m/276766
ORGANIZER:chao_wang_me@hust.edu.cn
SEQUENCE:2
SUMMARY:IEEE CASS-EDS-SSCS & SOEI-HUST Joint Technical Seminar No. 17 “En
 ergy-Efficient Path-Planning Processor for Autonomous Navigation of Micro 
 Robots”
URL;VALUE=URI:https://events.vtools.ieee.org/m/276766
X-ALT-DESC:Description: <br /><p>Recent advances in autonomous micro robots
  have changed the way humans live and work. Robots are now able to assist 
 humans or even substitute them in many applications. For autonomous naviga
 tion\, robots need to perceive the environment\, make decisions based on t
 he information collected\, and autonomously take action. The sensed data a
 re first analyzed to create a map. In the cognition phase\, the actions of
  the robot need to be determined based on its objectives. The tasks includ
 e identifying a path\, from a given start and endpoint\, without colliding
  with any obstacles. Then motion control commands are executed so as to gu
 ide the robots along the safest path. To accelerate path planning\, GPUs h
 ave been proposed in order to improve the performance. However\, GPU-based
  designs require hundreds of milliseconds to perform path planning and con
 sume a considerable amount of power\, which is not feasible for battery-po
 wered micro robots. In this talk\, I will present a path planning processo
 r for 2-D/3-D autonomous navigation. Energy and latency are minimized thro
 ugh algorithm-architecture optimization. The chip achieves orders of magni
 tude improvement in both energy efficiency and latency over the state-of-t
 he-art design.</p>
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