BEGIN:VCALENDAR VERSION:2.0 PRODID:IEEE vTools.Events//EN CALSCALE:GREGORIAN BEGIN:VTIMEZONE TZID:America/Sao_Paulo BEGIN:DAYLIGHT DTSTART:20380119T001407 TZOFFSETFROM:-0300 TZOFFSETTO:-0300 RRULE:FREQ=YEARLY;BYDAY=3TU;BYMONTH=1 TZNAME:-03 END:DAYLIGHT BEGIN:STANDARD DTSTART:20190216T230000 TZOFFSETFROM:-0200 TZOFFSETTO:-0300 RRULE:FREQ=YEARLY;BYDAY=3SA;BYMONTH=2 TZNAME:-03 END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20211222T134328Z UID:A245E476-FFA6-4E38-8DF2-FBB0BBD71008 DTSTART;TZID=America/Sao_Paulo:20211008T133000 DTEND;TZID=America/Sao_Paulo:20211008T153000 DESCRIPTION:Abstract:\n\nThe Internet of Things (IoT) has been hailed as th e next frontier of innovation in which our everyday objects are connected in ways that improve our lives and transform industries. However\, major c hallenges remain in achieving this potential due to the inherent complexit y of designing energy-efficient IoT architectures to provide onboard proce ssing capabilities where data are gathered (edge computing) for many diffe rent possible applications\, often resulting in degraded and unreliable be havior and a short lifetime. Prof. Atienza will first present the challeng es of ultra-low power (ULP) design and communication overhead in next-gene ration IoT devices in the context of Big Data processing. Then\, the benef its of exploiting the latest knowledge of how mammalian brains operate to conceive future edge Artificial Intelligence (AI) enabled architectures wi ll be discussed. These new edge AI architectures must be heterogeneous har dware systems\, including energy-scalable software layers that trigger the activation of components by event-driven techniques. As a result\, the ne xt-generation edge AI architectures will be able to gracefully adapt the e nergy consumption and output precision according to their available energy at each moment in time.\n\nShort Bio:\n\nDavid Atienza is a Professor of Electrical and Computer Engineering and heads the Embedded Systems Laborat ory (ESL) at EPFL\, Switzerland. He received his MSc and Ph.D. degrees in Computer Science and Engineering from UCM (Spain) and IMEC (Belgium). His research interests focus on system-level design methodologies for energy-e fficient computing systems\, particularly multi-processor system-on-chip a rchitectures (MPSoC) for servers and next-generation edge AI architectures for the Internet of Things (IoT) era. In these fields\, he is co-author o f more than 350 publications\, 12 patents\, and has received several best paper awards in top conferences. He was the Technical Program Chair of DAT E 2015 and General Chair of DATE 2017. Dr. Atienza received among other re cognitions\, the ICCAD 2020 10-Year Retrospective Most Influential Paper A ward\, the DAC Under-40 Innovators Award in 2018\, the IEEE TCCPS Mid-Care er Award in 2018\, an ERC Consolidator Grant in 2016\, the IEEE CEDA Early Career Award in 2013\, the ACM SIGDA Outstanding New Faculty Award in 201 2\, and a Faculty Award from Sun Labs at Oracle in 2011. He is an IEEE Fel low\, an ACM Distinguished Member\, and was the President (period 2018-201 9) of IEEE CEDA.\n\nVirtual: https://events.vtools.ieee.org/m/279995 LOCATION:Virtual: https://events.vtools.ieee.org/m/279995 ORGANIZER:jose.azambuja@inf.ufrgs.br SEQUENCE:1 SUMMARY:CASS Talks with David Atienza\, Embedded Systems Laboratory (ESL)\, EPFL\, Switzerland URL;VALUE=URI:https://events.vtools.ieee.org/m/279995 X-ALT-DESC:Description: <br /><p>&nbsp\;</p>\n<p>&nbsp\;</p>\n<p>Abstract:< /p>\n<p>The Internet of Things (IoT) has been hailed as the next frontier of innovation in which our&nbsp\;everyday objects are connected in ways th at improve our lives and transform industries.&nbsp\;However\, major chall enges remain in achieving this potential due to the inherent complexity&nb sp\;of designing energy-efficient IoT architectures to provide onboard pro cessing capabilities&nbsp\;where data are gathered (edge computing) for ma ny different possible applications\, often&nbsp\;resulting in degraded and unreliable behavior and a short lifetime. Prof. Atienza will first&nbsp\; present the challenges of ultra-low power (ULP) design and communication o verhead in&nbsp\;next-generation IoT devices in the context of Big Data pr ocessing. Then\, the benefits of&nbsp\;exploiting the latest knowledge of how mammalian brains operate to conceive future edge&nbsp\;Artificial Inte lligence (AI) enabled architectures will be discussed. These new edge AI&n bsp\;architectures must be heterogeneous hardware systems\, including ener gy-scalable software&nbsp\;layers that trigger the activation of component s by event-driven techniques. As a result\, the&nbsp\;next-generation edge AI architectures will be able to gracefully adapt the energy&nbsp\;consum ption and output precision according to their available energy at each mom ent in&nbsp\;time.&nbsp\;</p>\n<p>Short Bio:&nbsp\;</p>\n<p>David Atienza is a Professor of Electrical and Computer Engineering and heads the Embedd ed Systems&nbsp\;Laboratory (ESL) at EPFL\, Switzerland. He received his M Sc and Ph.D. degrees in Computer Science&nbsp\;and Engineering from UCM (S pain) and IMEC (Belgium). His research interests focus on system-level&nbs p\;design methodologies for energy-efficient computing systems\, particula rly multi-processor system-on-chip architectures (MPSoC) for servers and n ext-generation edge AI architectures for the Internet of&nbsp\;Things (IoT ) era. In these fields\, he is co-author of more than 350 publications\, 1 2 patents\, and has&nbsp\;received several best paper awards in top confer ences. He was the Technical Program Chair of DATE&nbsp\;2015 and General C hair of DATE 2017. Dr. Atienza received among other recognitions\, the ICC AD&nbsp\;2020 10-Year Retrospective Most Influential Paper Award\, the DAC Under-40 Innovators Award in&nbsp\;2018\, the IEEE TCCPS Mid-Career Award in 2018\, an ERC Consolidator Grant in 2016\, the IEEE CEDA&nbsp\;Early C areer Award in 2013\, the ACM SIGDA Outstanding New Faculty Award in 2012\ , and a Faculty&nbsp\;Award from Sun Labs at Oracle in 2011. He is an IEEE Fellow\, an ACM Distinguished Member\, and&nbsp\;was the President (perio d 2018-2019) of IEEE CEDA.</p> END:VEVENT END:VCALENDAR