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DTSTART;TZID=America/Sao_Paulo:20211105T133000
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DESCRIPTION:Abstract:\n\nEnergy efficiency and low-power computing are the 
 critical goals for the current and future generations of computing systems
 . In this talk I will give a deep dive on how to design energy efficient c
 omputing systems leveraging an open-platform approach: from open instructi
 on set architecture (ISA) to open Hardware design. I will move from RISC-V
  processors\, starting from ISA organization\, moving to micro-architectur
 e and finally to design and implementation. I will focus on the distinctiv
 e advantages offered by RISC-V openness and extensibility across these abs
 traction layers. I will use the open RISC-V cores from the Parallel Ultra 
 Low Power (PULP) platform as concrete case studies\, in single and multi-c
 ore configurations\, and heterogeneous combinations. I will also discuss o
 pportunities and challenges related to the silicon implementation of RISC-
 V based academic and commercial Systems-on-Chip and share a vision on futu
 re research and development opportunities and challenges on open cores and
  open (RISC-V) hardware.\n\nShort Bio:\n\nLuca Benini holds the chair of d
 igital Circuits and systems at ETHZ and is Full Professor at the Universit
 y di Bologna. He received a PhD from Stanford University. He has been visi
 ting professor at Stanford University\, IMEC\, EPFL\, and served as chief 
 architect in STMicroelectronics France. Dr. Benini's research interests ar
 e in energy-efficient parallel computing systems\, smart sensing micro-sys
 tems and machine learning hardware. He has published more than 1000 peer-r
 eviewed papers and five books. He a Fellow of the IEEE\, of the ACM and a 
 member of the Academia Europaea. He is the recipient of the 2016 IEEE CAS 
 Mac Van Valkenburg award\, the ACM/IEEE A. Richard Newton and the EDAA Ach
 ievement awards in 2020.\n\nVirtual: https://events.vtools.ieee.org/m/2800
 70
LOCATION:Virtual: https://events.vtools.ieee.org/m/280070
ORGANIZER:jose.azambuja@inf.ufrgs.br
SEQUENCE:1
SUMMARY:CASS Talks with Luca Benini\, ETHZ\, Switzerland and Università di
  Bologna\, Italy
URL;VALUE=URI:https://events.vtools.ieee.org/m/280070
X-ALT-DESC:Description: <br /><p>&nbsp\;</p>\n<p>&nbsp\;</p>\n<p>Abstract:<
 /p>\n<p>Energy efficiency and low-power computing are the critical goals &
 nbsp\;for the current and&nbsp\;future generations of computing systems. I
 n this talk I will give a deep dive on how to&nbsp\;design energy efficien
 t computing systems leveraging an open-platform approach: from&nbsp\;open 
 instruction set architecture (ISA) to open Hardware design. &nbsp\;I will 
 move from RISC-V processors\, starting from ISA organization\, moving to m
 icro-architecture and finally to&nbsp\;design and implementation. I will f
 ocus on the distinctive advantages offered by RISC-V&nbsp\;openness and ex
 tensibility across these abstraction layers. I will use the open RISC-V&nb
 sp\;cores from the Parallel Ultra Low Power (PULP) platform as concrete ca
 se studies\, in&nbsp\;single and multi-core configurations\, and heterogen
 eous combinations. I will also discuss&nbsp\;opportunities and challenges 
 related to the silicon implementation of RISC-V based&nbsp\;&nbsp\;academi
 c and commercial Systems-on-Chip and share a vision on future research and
 &nbsp\;development opportunities and challenges on open cores and open (RI
 SC-V) hardware.</p>\n<p>Short Bio:&nbsp\;</p>\n<p>Luca Benini holds the ch
 air of digital Circuits and systems at ETHZ and is Full Professor&nbsp\;at
  the University di Bologna. He received a PhD from Stanford University. He
  has been&nbsp\;visiting professor at Stanford University\, IMEC\, EPFL\, 
 and served as chief architect in&nbsp\;STMicroelectronics France. Dr. Beni
 ni's research interests are in energy-efficient parallel&nbsp\;computing s
 ystems\, smart sensing micro-systems and machine learning hardware. He has
 &nbsp\;published more than 1000 peer-reviewed papers and five books. He a 
 Fellow of the IEEE\,&nbsp\;of the ACM and a member of the Academia Europae
 a. &nbsp\;He is the recipient of the 2016&nbsp\;IEEE CAS Mac Van Valkenbur
 g award\, &nbsp\;the ACM/IEEE A. Richard Newton and the EDAA&nbsp\;Achieve
 ment awards in 2020.&nbsp\;</p>
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