BEGIN:VCALENDAR VERSION:2.0 PRODID:IEEE vTools.Events//EN CALSCALE:GREGORIAN BEGIN:VTIMEZONE TZID:Israel BEGIN:DAYLIGHT DTSTART:20210326T030000 TZOFFSETFROM:+0200 TZOFFSETTO:+0300 RRULE:FREQ=YEARLY;BYDAY=-1FR;BYMONTH=3 TZNAME:IDT END:DAYLIGHT BEGIN:STANDARD DTSTART:20211031T010000 TZOFFSETFROM:+0300 TZOFFSETTO:+0200 RRULE:FREQ=YEARLY;BYDAY=-1SU;BYMONTH=10 TZNAME:IST END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20211011T070413Z UID:7B4D4255-6F3F-4E98-B5A1-05E2F7FDB7AE DTSTART;TZID=Israel:20210608T110000 DTEND;TZID=Israel:20210608T123000 DESCRIPTION:IC chips are key enablers to a smartly networked society and ne ed to be more compliant to security and safety. For example\, semiconducto r solutions for autonomous vehicles must meet stringent regulations and re quirements. While designers develop circuits and systems to meet the perfo rmance and　functionality of such products\, countermeasures are proactiv ely implemented in silicon to protect against harmful disturbances and eve n intentional adversarial attacks.\n\nThis talk will start with Electromag netic Compatibility (EMC) techniques applied to IC chips for safety to mot ivate EMC-aware design\, analysis\, and implementation. It will discuss IC design challenges to achieve higher levels of hardware security (HWS). Cr ypto-based secure IC chips are investigated to avoid the risks of side-cha nnel leakages and side-channel attacks\, corroborated with silicon demonst rating analog techniques to protect digital functionality. The EMC and HWS disciplines derived from electromagnetic principles are key to establishi ng IC design principles for security and safety.\n\nMakoto Nagata received the B.S. and M.S. degrees in physics from Gakushuin University\, Tokyo\, in 1991 and 1993\, respectively\, and a Ph.D. in electronics engineering f rom Hiroshima University\, Hiroshima\, in 2001.. He is currently a profess or of the graduate school of science\, technology and innovation\, Kobe Un iversity\, Kobe\, Japan. He is a senior member of IEICE and IEEE.\n\nHis r esearch interests include design techniques targeting high-performance mix ed analog\, RF and digital VLSI systems with particular emphasis on power/ signal/substrate integrity and electromagnetic compatibility\, testing and diagnosis\, three-dimensional system integration\, as well as their appli cations for hardware security and safety.\n\nDr. Nagata has been a member of a variety of technical program committees of international conferences. He is chairing the Technology Directions subcommittee for International S olid-State Circuits Conference (2018-present). He is also serving as SSCS AdCom member since 2020. He is currently an associate editor for IEEE Tran sactions on VLSI Systems (2015-present).\n\nVirtual: https://events.vtools .ieee.org/m/285153 LOCATION:Virtual: https://events.vtools.ieee.org/m/285153 ORGANIZER:shahar@ee.technion.ac.il SEQUENCE:0 SUMMARY:Hardware Security and Safety of IC Chips - Prof. Makoto Nagata Univ ersity of Kobe\, Japan URL;VALUE=URI:https://events.vtools.ieee.org/m/285153 X-ALT-DESC:Description: <br /><p>IC chips are key enablers to a smartly net worked society and need to be more compliant to security and safety. For e xample\, semiconductor solutions for autonomous vehicles must meet stringe nt regulations and requirements. While designers develop circuits and syst ems to meet the performance and　functionality of such products\, counter measures are proactively implemented in silicon to protect against harmful disturbances and even intentional adversarial attacks.</p>\n<p>This talk will start with Electromagnetic Compatibility (EMC) techniques applied to IC chips for safety to motivate EMC-aware design\, analysis\, and implemen tation. It will discuss IC design challenges to achieve higher levels of h ardware security (HWS). Crypto-based secure IC chips are investigated to a void the risks of side-channel leakages and side-channel attacks\, corrobo rated with silicon demonstrating analog techniques to protect digital func tionality. The EMC and HWS disciplines derived from electromagnetic princi ples are key to establishing IC design principles for security and safety. </p>\n<p><strong>Makoto Nagata</strong>&nbsp\;received the B.S. and M.S. d egrees in physics from Gakushuin University\, Tokyo\, in 1991 and 1993\, r espectively\, and a Ph.D. in electronics engineering from Hiroshima Univer sity\, Hiroshima\, in 2001.. He is currently a professor of the graduate s chool of science\, technology and innovation\, Kobe University\, Kobe\, Ja pan. He is a senior member of IEICE and IEEE.</p>\n<p>His research interes ts include design techniques targeting high-performance mixed analog\, RF and digital VLSI systems with particular emphasis on power/signal/substrat e integrity and electromagnetic compatibility\, testing and diagnosis\, th ree-dimensional system integration\, as well as their applications for har dware security and safety.</p>\n<p>Dr. Nagata has been a member of a varie ty of technical program committees of international conferences. He is cha iring the Technology Directions subcommittee for International Solid-State Circuits Conference (2018-present). He is also serving as SSCS AdCom memb er since 2020. He is currently an associate editor for IEEE Transactions o n VLSI Systems (2015-present).</p> END:VEVENT END:VCALENDAR