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DTSTAMP:20220124T061933Z
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DTSTART;TZID=US/Central:20220118T180000
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DESCRIPTION:The Austin and National Newspapers\, both technical and popular
 \, trumpet the choice of Taylor Tx for Samsung's next Semiconductor Factor
 y. These headlines almost always emphasize the bit of information that the
  plant is expected to cost 17 billion Dollars. That is almost an unimagina
 ble level of expense\, yet it is indicative of the cost trends of the indu
 stry and the gradual shifting of semiconductor manufacturing to mega-plant
 s\, capable of the highest level of integration and the largest wafers.\n\
 nThis talk will examine these cost drivers and attempt to integrate their 
 effect to see just how big the number gets! Expected contributors on the p
 rocess side are the expected use of EUV lithography\, leading edge materia
 ls solutions such as copper interconnect and high-k dielectric and simply 
 the increasing number of metal layers required by advanced designs. This i
 s coupled however\, with the cost effects of the best practices for semico
 nductor manufacturing: The effect of 300mm tool cost\, the cost of facilit
 ies and power\, and possible choices made towards production volume and to
 ol redundancy.\n\nSpeaker(s): Larry Larson\, \n\nAgenda: \n6:00 to 6:15 PM
  - Open for participants to enter and network.\n6:15 to 6:30 PM - IEEE LM 
 and CTCN Business meeting and to introduce speaker.\n6:30 to 8:00 PM - For
 mal Program and Q&A.\n\nZoom Meeting Platform\, Austin \, Texas\, United S
 tates\, Virtual: https://events.vtools.ieee.org/m/295924
LOCATION:Zoom Meeting Platform\, Austin \, Texas\, United States\, Virtual:
  https://events.vtools.ieee.org/m/295924
ORGANIZER:kaiwong@ieee.org
SEQUENCE:3
SUMMARY:CTS LM-CTCN-EDC Jan 18\,2022 Meeting - $17B Wafer Fab!! Really?
URL;VALUE=URI:https://events.vtools.ieee.org/m/295924
X-ALT-DESC:Description: <br /><p>The Austin and National Newspapers\, both 
 technical and popular\, trumpet the choice of Taylor Tx for Samsung's next
  Semiconductor Factory.&nbsp\; These headlines almost always emphasize the
  bit of information that the plant is expected to cost 17 billion Dollars.
 &nbsp\; That is almost an unimaginable level of expense\, yet it is indica
 tive of the cost trends of the industry and the gradual shifting of semico
 nductor manufacturing to mega-plants\, capable of the highest level of int
 egration and the largest wafers.</p>\n<p>This talk will examine these cost
  drivers and attempt to integrate their effect to see just how big the num
 ber gets!&nbsp\; Expected contributors on the process side are the expecte
 d use of EUV lithography\, leading edge materials solutions such as copper
  interconnect and high-k dielectric and simply the increasing number of me
 tal layers required by advanced designs.&nbsp\; This is coupled however\, 
 with the cost effects of the best practices for semiconductor manufacturin
 g:&nbsp\; The effect of 300mm tool cost\, the cost of facilities and power
 \, and possible choices made towards production volume and tool redundancy
 . &nbsp\;</p><br /><br />Agenda: <br /><div dir="ltr" data-setdir="false">
 6:00 to 6:15 PM - Open for participants to enter and network.&nbsp\;</div>
 \n<div dir="ltr" data-setdir="false">6:15 to 6:30 PM - IEEE LM and CTCN Bu
 siness meeting and to introduce speaker.</div>\n<div dir="ltr" data-setdir
 ="false">6:30 to 8:00 PM - Formal Program and Q&amp\;A.&nbsp\;</div>\n<div
  dir="ltr" data-setdir="false">&nbsp\;</div>
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