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DTSTAMP:20221230T130619Z
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DTSTART;TZID=Israel:20220119T100000
DTEND;TZID=Israel:20220119T120000
DESCRIPTION:We invite you to a free online seminar on “Bringing ML to the
  extreme edge: a story of co-optimizing processor architectures\, scheduli
 ng and models” given by Prof. Marian Verhelst\, KU Leuven\, Belgium.\n\n
 Deep neural network inference comes with significant computational complex
 ity\, making their execution until recently only feasible on power-hungry 
 server or GPU platforms. The recent trend towards real-time embedded neura
 l network processing on edge and extreme edge devices requires a thorough 
 cross-layer optimization. The talk will analyze what impacts NN execution 
 energy and latency. Subsequently\, we will present different research line
 s of Prof. Verhelst’s lab exploiting and jointly optimizing NPU/TPU proc
 essor architectures\, dataflow schedulers and conditional\, quantized neur
 al network models for minimum latency and maximum energy efficiency. This 
 includes precision-scalable fully-digital designs\, as well as compute-in-
 memory processors. Finally\, this talk will make a case for more methodolo
 gical design space exploration in the vast optimization space of embedded 
 NN processors\, using the ZigZag framework.\n\nPlease sign up and join us 
 on Wednesday\, January 19\, 2022 at 10:00 (Israel Time).\n\nA link to the 
 Zoom session will be provided after registration.\n\nImportant: The partic
 ipation is free of charge\, but registration is required https://acrc.net.
 technion.ac.il/registration-marian-verhelst/\n\nFor more details and updat
 es on the series of “ACRC Semiconductor Webinars” please follow our ne
 wsletters and our website https://acrc.net.technion.ac.il/\n\nHaifa\, Haif
 a District\, Israel\, Virtual: https://events.vtools.ieee.org/m/297199
LOCATION:Haifa\, Haifa District\, Israel\, Virtual: https://events.vtools.i
 eee.org/m/297199
ORGANIZER:shahar@ee.technion.ac.il
SEQUENCE:5
SUMMARY:Bringing ML to the extreme edge: a story of co-optimizing processor
  architectures\, scheduling and models
URL;VALUE=URI:https://events.vtools.ieee.org/m/297199
X-ALT-DESC:Description: &lt;br /&gt;&lt;p&gt;We &lt;span lang=&quot;de&quot;&gt;invite you to a&amp;nbsp\;&lt;
 strong&gt;&lt;u&gt;free&lt;/u&gt;&lt;/strong&gt;&amp;nbsp\;online seminar on&amp;nbsp\;&lt;/span&gt;&lt;strong&gt;&amp;
 ldquo\;Bringing ML to the extreme edge: a story of co-optimizing processor
  architectures\, scheduling and models&amp;rdquo\;&amp;nbsp\;&lt;/strong&gt;&lt;span lang=&quot;
 de&quot;&gt;given by&amp;nbsp\;&lt;/span&gt;&lt;strong&gt;Prof. Marian Verhelst\,&amp;nbsp\;&lt;/strong&gt;K
 U Leuven\, Belgium.&lt;/p&gt;\n&lt;p&gt;Deep neural network inference comes with signi
 ficant computational complexity\, making their execution until recently on
 ly feasible on power-hungry server or GPU platforms. The recent trend towa
 rds real-time embedded neural network processing on edge and extreme edge 
 devices requires a thorough cross-layer optimization. The talk will analyz
 e what impacts NN execution energy and latency. Subsequently\, we will pre
 sent different research lines of Prof. Verhelst&amp;rsquo\;s lab exploiting an
 d jointly optimizing NPU/TPU processor architectures\, dataflow schedulers
  and conditional\, quantized neural network models for minimum latency and
  maximum energy efficiency. This includes precision-scalable fully-digital
  designs\, as well as compute-in-memory processors. Finally\, this talk wi
 ll make a case for more methodological design space exploration in the vas
 t optimization space of embedded NN processors\, using the ZigZag framewor
 k.&lt;/p&gt;\n&lt;p&gt;Please&amp;nbsp\;&lt;strong&gt;sign up&lt;/strong&gt;&amp;nbsp\;and&amp;nbsp\;&lt;strong&gt;j
 oin&lt;/strong&gt;&amp;nbsp\;&lt;span lang=&quot;de&quot;&gt;us on&lt;/span&gt;&amp;nbsp\;&lt;strong&gt;Wednesday\, 
 January 19\, 2022&amp;nbsp\;&lt;/strong&gt;at&lt;strong&gt;&amp;nbsp\;10:00 (Israel Time)&lt;/str
 ong&gt;.&lt;/p&gt;\n&lt;p&gt;A link to the&amp;nbsp\;&lt;strong&gt;Zoom session&lt;/strong&gt;&amp;nbsp\;will
  be provided after registration.&lt;/p&gt;\n&lt;p&gt;&lt;strong&gt;Important&lt;/strong&gt;: The p
 articipation is free of charge\, but registration is required&amp;nbsp\;&lt;stron
 g&gt;&lt;a href=&quot;https://acrc.net.technion.ac.il/registration-marian-verhelst/&quot; 
 target=&quot;_blank&quot; rel=&quot;noopener noreferrer&quot; data-auth=&quot;NotApplicable&quot; data-l
 inkindex=&quot;0&quot;&gt;https://acrc.net.technion.ac.il/registration-marian-verhelst/
 &lt;/a&gt;&lt;/strong&gt;&lt;/p&gt;\n&lt;p&gt;For more details and updates on the series of&amp;nbsp\;
 &lt;strong&gt;&lt;span lang=&quot;de&quot;&gt;&amp;ldquo\;ACRC Semiconductor Webinars&amp;rdquo\;&amp;nbsp\;
 &lt;/span&gt;&lt;/strong&gt;please&amp;nbsp\;&lt;strong&gt;follow&amp;nbsp\;&lt;/strong&gt;our&lt;strong&gt;&amp;nbs
 p\;newsletters&lt;/strong&gt;&amp;nbsp\;and our&amp;nbsp\;&lt;strong&gt;website&lt;/strong&gt;&amp;nbsp\
 ;&lt;strong&gt;&lt;a href=&quot;https://acrc.net.technion.ac.il/&quot; target=&quot;_blank&quot; rel=&quot;n
 oopener noreferrer&quot; data-auth=&quot;NotApplicable&quot; data-linkindex=&quot;1&quot;&gt;https://a
 crc.net.technion.ac.il/&lt;/a&gt;&lt;/strong&gt;&lt;/p&gt;\n&lt;p&gt;&amp;nbsp\;&lt;/p&gt;\n&lt;p&gt;&amp;nbsp\;&lt;/p&gt;\n
 &lt;p aria-hidden=&quot;true&quot;&gt;&amp;nbsp\;&lt;/p&gt;
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