BEGIN:VCALENDAR VERSION:2.0 PRODID:IEEE vTools.Events//EN CALSCALE:GREGORIAN BEGIN:VTIMEZONE TZID:America/New_York BEGIN:DAYLIGHT DTSTART:20220313T030000 TZOFFSETFROM:-0500 TZOFFSETTO:-0400 RRULE:FREQ=YEARLY;BYDAY=2SU;BYMONTH=3 TZNAME:EDT END:DAYLIGHT BEGIN:STANDARD DTSTART:20211107T010000 TZOFFSETFROM:-0400 TZOFFSETTO:-0500 RRULE:FREQ=YEARLY;BYDAY=1SU;BYMONTH=11 TZNAME:EST END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20220311T144410Z UID:6AB3D638-2826-41F0-A55D-5B9321D34C49 DTSTART;TZID=America/New_York:20220310T175000 DTEND;TZID=America/New_York:20220310T194400 DESCRIPTION:Internet of Things (IoT) devices are projected to attain an $11 00B market by 2025\, with a web of interconnection projected to comprise a pproximately 75+ billion IoT devices. The large number of IoTs consist of sensory systems that enable massive data collection from the environment a nd people. However\, considerable portions of the captured sensory data ar e redundant and unstructured. Data conversion of such large raw data\, sto ring in volatile memories\, transmission\, and computation in on-/off-chip processors\, impose high energy consumption\, latency\, and a memory bott leneck at the edge. Moreover\, because renewing batteries for IoT devices is very costly and sometimes impracticable\, energy harvesting devices wit h ambient energy sources and low maintenance have impacted a wide range of IoT applications such as wearable devices\, smart cities\, and the intell igent industry. Therefore\, high-speed\, low-power and normally-off comput ing domain-specific architectures should be explored and developed to over come these issues. Motivated by the aforementioned concerns\, in this talk \, I will be focusing on cross-layer (device/circuit/architecture/applicat ion) co-design of energy-efficient and high-performance processing- in-sen sor and processing- in-memory platforms for implementing complex AI and ma chine learning tasks\, bioinformatics tasks\, graph processing\, etc. I ex plain how to leverage innovations from both device to architecture to inte grate sensor\, memory\, and logic to break the existing memory and power w alls.\n\nCo-sponsored by: IEEE North Jersey Section\n\nSpeaker(s): Prof. S haahin Angizi\, \n\nAgenda: \nEvent Time: 6:00PM to 7:30 PM\n\nVenue: Kier nan Conference Room (ECE 202)\, ECEC\, NJIT\, Newark\n\nTalk by Prof. Shaa hin Angizi\n\nSeminar in ECE 202 All Welcome: There is no fee/charge for a ttending IEEE technical seminar. You don't have to be an IEEE Member to at tend. Refreshment is free for all attendees. Please invite your friends an d colleagues to take advantage of this Invited Lecture.\n\nRoom: 202\, Bld g: ECEC\, 154 Summit Street\, Newark\, NJ 07102\, NJIT\, Newark\, New Jers ey\, United States\, 07102 LOCATION:Room: 202\, Bldg: ECEC\, 154 Summit Street\, Newark\, NJ 07102\, N JIT\, Newark\, New Jersey\, United States\, 07102 ORGANIZER:dmisra@njit.edu SEQUENCE:5 SUMMARY:Towards Energy-Efficient Domain-Specific In-Sensor and In-Memory Ac celerators\, From Device to Algorithm URL;VALUE=URI:https://events.vtools.ieee.org/m/303480 X-ALT-DESC:Description: <br /><p>Internet of Things (IoT) devices are proje cted to attain an $1100B market by 2025\, with a web of interconnection pr ojected to comprise approximately 75+ billion IoT devices. The large numbe r of IoTs consist of sensory systems that enable massive data collection f rom the environment and people. However\, considerable portions of the cap tured sensory data are redundant and unstructured. Data conversion of such large raw data\, storing in volatile memories\, transmission\, and comput ation in on-/off-chip processors\, impose high energy consumption\, latenc y\, and a memory bottleneck at the edge. Moreover\, because renewing batte ries for IoT devices is very costly and sometimes impracticable\, energy h arvesting devices with ambient energy sources and low maintenance have imp acted a wide range of IoT applications such as wearable devices\, smart ci ties\, and the intelligent industry. Therefore\, high-speed\, low-power an d normally-off computing domain-specific architectures should be explored and developed to overcome these issues. Motivated by the aforementioned co ncerns\, in this talk\, I will be focusing on cross-layer (device/circuit/ architecture/<wbr />application) co-design of energy-efficient and high-pe rformance processing- in-sensor and processing- in-memory platforms for im plementing complex AI and machine learning tasks\, bioinformatics tasks\, graph processing\, etc. I explain how to leverage innovations from both de vice to architecture to integrate sensor\, memory\, and logic to break the existing memory and power walls.</p><br /><br />Agenda: <br /><p>Event Ti me: 6:00PM to 7:30 PM</p>\n<p>Venue: Kiernan Conference Room (ECE 202)\, & nbsp\;ECEC\, NJIT\, Newark</p>\n<p>Talk by Prof. Shaahin Angizi</p>\n<p>Se minar in ECE 202 All Welcome: There is no fee/charge for attending IEEE te chnical seminar. You don't have to be an IEEE Member to attend. Refreshmen t is free for all attendees. Please invite your friends and colleagues to take advantage of this Invited Lecture.</p> END:VEVENT END:VCALENDAR