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DTSTART:20220313T030000
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DTSTART:20221106T010000
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DTSTAMP:20220526T232910Z
UID:9299B067-EB76-4340-94A5-52B95617DC83
DTSTART;TZID=US/Pacific:20220503T180000
DTEND;TZID=US/Pacific:20220503T193000
DESCRIPTION:In recent years higher integration of optics with electronics h
 as been proposed using the advantages of silicon photonics. In particular 
 co-packaging of optical engines with Ethernet switch ICs. Within the last 
 year there has been a lot of progress on these co-packaged optical switch 
 designs. This presentation shows the architecture and performance data of 
 a &quot;half optics&quot; 25Tb/s switch system with a linear interface between the o
 ptical engine and the switch SERDES as one implementation example. Design 
 considerations and potential implementation issues are addressed. An outlo
 ok for future systems is given.\n\nSpeaker(s): Karl Muth\, \n\nsanta clara
 \, California\, United States\, Virtual: https://events.vtools.ieee.org/m/
 312554
LOCATION:santa clara\, California\, United States\, Virtual: https://events
 .vtools.ieee.org/m/312554
ORGANIZER:stliu.photonics@gmail.com
SEQUENCE:3
SUMMARY:Progress on Co-Packaged Optics: &quot;Half-Optics&quot; 25.6Tb/s Ethernet Swi
 tch
URL;VALUE=URI:https://events.vtools.ieee.org/m/312554
X-ALT-DESC:Description: &lt;br /&gt;&lt;p&gt;In recent years higher integration of opti
 cs with electronics has been proposed using the advantages of silicon phot
 onics. In particular co-packaging of optical engines with Ethernet switch 
 ICs. Within the last year there has been a lot of progress on these co-pac
 kaged optical switch designs. This presentation shows the architecture and
  performance data of a &quot;half optics&quot; 25Tb/s switch system with a linear in
 terface between the optical engine and the switch SERDES as one implementa
 tion example. Design considerations and potential implementation issues ar
 e addressed. An outlook for future systems is given.&lt;/p&gt;
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