BEGIN:VCALENDAR VERSION:2.0 PRODID:IEEE vTools.Events//EN CALSCALE:GREGORIAN BEGIN:VTIMEZONE TZID:America/Sao_Paulo BEGIN:DAYLIGHT DTSTART:20380119T001407 TZOFFSETFROM:-0300 TZOFFSETTO:-0300 RRULE:FREQ=YEARLY;BYDAY=3TU;BYMONTH=1 TZNAME:-03 END:DAYLIGHT BEGIN:STANDARD DTSTART:20190216T230000 TZOFFSETFROM:-0200 TZOFFSETTO:-0300 RRULE:FREQ=YEARLY;BYDAY=3SA;BYMONTH=2 TZNAME:-03 END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20230103T144101Z UID:3F081D7F-66B4-488C-BB7A-1BB94D098E59 DTSTART;TZID=America/Sao_Paulo:20220513T133000 DTEND;TZID=America/Sao_Paulo:20220513T153000 DESCRIPTION:Abstract:\n\nDNNs largely overwhelm conventional computing syst ems because the latter is severely bottlenecked by the data movement betwe en processing units and memory. As a result\, novel and intelligent comput ing systems become more and more inevitable. In this talk\, I will be focu sing on the emerging ferroelectric (FeFET) technology and its great potent ial in building efficient in-memory computing architectures. I will explai n how abstracted reliability models can be developed from device physics t o circuits and later employed towards realizing HW/SW codesign for robust in-memory computing. Further\, I will also discuss how FeFET-based in-memo ry computing outstandingly synergizes with Binarized Neural Networks (BNNs ) and novel Brain-inspired Hyperdimensional Computing (HDC).\n\nShort Bio: \n\nHussam Amrouch is a J.-Professor heading the Chair of Semiconductor Te st and Reliability (STAR) within the University of Stuttgart. He received his Ph.D. degree with the highest distinction (summa cum laude) from KIT i n 2015. His main research interests are AI processor design\, beyond von-N eumann architectures\, HW security\, and emerging technologies. He holds e ight HiPEAC paper awards. He has given 10 tutorials in many major EDA conf erences such as DAC and ICCAD and more 25 invited talks in many companies and universities. He is a reviewer in many top journals including Nature E lectronics. He has around 160 publications (including 64 journals) in mult idisciplinary research areas across the entire computing stack\, starting from semiconductor physics to circuit design all the way up to computer ar chitecture.\n\nVirtual: https://events.vtools.ieee.org/m/313582 LOCATION:Virtual: https://events.vtools.ieee.org/m/313582 ORGANIZER:jose.azambuja@inf.ufrgs.br SEQUENCE:3 SUMMARY:CASS Talks with Hussam Amrouch\, University of Stuttgart\, Germany URL;VALUE=URI:https://events.vtools.ieee.org/m/313582 X-ALT-DESC:Description: <br /><p>&nbsp\;</p>\n<p>&nbsp\;</p>\n<p>Abstract:< /p>\n<p>DNNs largely overwhelm conventional computing systems because the latter is severely bottlenecked by the data movement between processing un its and memory. As a result\, novel and intelligent computing systems beco me more and more inevitable. In this talk\, I will be focusing on the emer ging ferroelectric (FeFET) technology and its great potential in building efficient in-memory computing architectures. I will explain how abstracted reliability models can be developed from device physics to circuits and l ater employed towards realizing HW/SW codesign for robust in-memory comput ing. Further\, I will also discuss how FeFET-based in-memory computing out standingly synergizes with Binarized Neural Networks (BNNs) and novel Brai n-inspired Hyperdimensional Computing (HDC).</p>\n<p>Short Bio:&nbsp\;</p> \n<p>Hussam Amrouch is a J.-Professor heading the Chair of Semiconductor T est and Reliability (STAR) within the University of Stuttgart. He received his Ph.D. degree with the highest distinction (summa cum laude) from KIT in 2015. His main research interests are AI processor design\, beyond von- Neumann architectures\, HW security\, and emerging technologies. He holds eight HiPEAC paper awards. He has given 10 tutorials in many major EDA con ferences such as DAC and ICCAD and more 25 invited talks in many companies and universities. He is a reviewer in many top journals including Nature Electronics. He has around 160 publications (including 64 journals) in mul tidisciplinary research areas across the entire computing stack\, starting from semiconductor physics to circuit design all the way up to computer a rchitecture.</p> END:VEVENT END:VCALENDAR