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DTSTAMP:20220815T172406Z
UID:560000C4-4D4D-4F7E-9CCC-B21740761558
DTSTART;TZID=America/New_York:20220809T140000
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DESCRIPTION:Progress in computation and communication is increasingly bottl
 enecked by integrated circuit I/O. Previously reserved for communication o
 ver 100’s of kilometres\, today optical links are widely viewed as the p
 rimary solution for chip-to-chip links above 100 Gbps and up to 1 km. Mean
 while\, CMOS technology scaling has led us toward integrated circuit trans
 ceivers that are\, essentially\, complete modems: thin but critical analog
  front-end circuits and a large custom DSP. This presentation will describ
 e how to co-design of DSP transceivers with a thin but critical analog fro
 nt-end and the associated optical components to create optical links servi
 ng future datacentre communication needs. As an example\, a 4-PAM CMOS lin
 ear TIA designed in a FinFET technology consuming less than 50 mW and co-p
 ackaged alongside photodiodes is presented. The circuits and packaging are
  co-designed to maximize the passive front-end BW. Experimental results co
 nfirm the integrated optical fibre receiver operates up to 160-Gb/s using 
 a single wavelength with a suitable DSP.\n\nSpeaker(s): Dr. Tony Chan Caru
 sone\, \n\nRoom: 1.162\, Bldg: EV\, 1515 Ste-Catherine West\, Montreal\, Q
 uebec\, Canada\, H3G1M8
LOCATION:Room: 1.162\, Bldg: EV\, 1515 Ste-Catherine West\, Montreal\, Queb
 ec\, Canada\, H3G1M8
ORGANIZER:gcowan@ece.concordia.ca
SEQUENCE:4
SUMMARY:Optimization of DSP-Based Optical Communication Links Beyond 100Gbp
 s
URL;VALUE=URI:https://events.vtools.ieee.org/m/321034
X-ALT-DESC:Description: <br /><p>Progress in computation and communication 
 is increasingly bottlenecked by integrated circuit I/O. Previously reserve
 d for communication over 100&rsquo\;s of kilometres\, today optical links 
 are widely viewed as the primary solution for chip-to-chip links above 100
  Gbps and up to 1 km.&nbsp\; Meanwhile\, CMOS technology scaling has led u
 s toward integrated circuit transceivers that are\, essentially\, complete
  modems: thin but critical analog front-end circuits and a large custom DS
 P.&nbsp\; This presentation will describe how to co-design of DSP transcei
 vers with a thin but critical analog front-end and the associated optical 
 components to create optical links serving future datacentre communication
  needs.&nbsp\; As an example\, a 4-PAM CMOS linear TIA designed in a FinFE
 T technology consuming less than 50 mW and co-packaged alongside photodiod
 es is presented. The circuits and packaging are co-designed to maximize th
 e passive front-end BW. Experimental results confirm the integrated optica
 l fibre receiver operates up to 160-Gb/s using a single wavelength with a 
 suitable DSP.</p>
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