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DTSTART:20220313T030000
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DTSTART:20221106T010000
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BEGIN:VEVENT
DTSTAMP:20221006T190105Z
UID:B7B6BD06-66A5-491B-AB93-703EDDCD89F2
DTSTART;TZID=America/Los_Angeles:20220929T150000
DTEND;TZID=America/Los_Angeles:20220929T160000
DESCRIPTION:The steady increase in internet data traffic and 5G adoption is
  driving significant increases in interconnect bandwidth\, channel speed a
 nd channel density\, especially across hyperscale data centers and cloud s
 ervice providers. This\, in turn\, is driving advances in ASIC and optical
  interconnect technologies\, resulting in doubling of aggregate bandwidth 
 per device roughly every two years. Silicon photonics-based optical interc
 onnects are increasingly playing a critical role in enabling each next gen
 eration of higher bandwidth\, higher density interconnects while enabling 
 power and cost efficiency with small form factors. As the industry is deve
 loping 1.6Tb/s and beyond optical pluggable devices\, significant challeng
 es need to be overcome\, especially relating to electrical and optical IC 
 integration\, large channel count optical fiber coupling\, high-power lase
 r integration\, as well as managing thermal dissipation and overall cost. 
 This talk will focus on some of these challenges associated with building 
 next-generation high-bandwidth optical devices\, including co-packaging op
 tics with ASICs\, as well as discussing possible paths for mitigating some
  of these challenges using innovations in advanced packaging processes and
  materials. Optimizing advanced packaging architectures for optical device
 s can help scale the next generation of optical interconnects while reduci
 ng cost per bit and power per bit metrics that are critical for adoption o
 f these devices in volume across the hyperscale networking ecosystem.\n\nS
 peaker(s): Sandeep Razdan\, \n\nVirtual: https://events.vtools.ieee.org/m/
 325012
LOCATION:Virtual: https://events.vtools.ieee.org/m/325012
ORGANIZER:p.wesling@ieee.org
SEQUENCE:3
SUMMARY:Challenges In Photonics Packaging For Next-Generation Hyperscale Ne
 tworking Applications
URL;VALUE=URI:https://events.vtools.ieee.org/m/325012
X-ALT-DESC:Description: &lt;br /&gt;&lt;p&gt;The steady increase in internet data traff
 ic and 5G adoption is driving significant increases in interconnect bandwi
 dth\, channel speed and channel density\, especially across hyperscale dat
 a centers and cloud service providers. This\, in turn\, is driving advance
 s in ASIC and optical interconnect technologies\, resulting in doubling of
  aggregate bandwidth per device roughly every two years. Silicon photonics
 -based optical interconnects are increasingly playing a critical role in e
 nabling each next generation of higher bandwidth\, higher density intercon
 nects while enabling power and cost efficiency with small form factors. As
  the industry is developing 1.6Tb/s and beyond optical pluggable devices\,
  significant challenges need to be overcome\, especially relating to elect
 rical and optical IC integration\, large channel count optical fiber coupl
 ing\, high-power laser integration\, as well as managing thermal dissipati
 on and overall cost. This talk will focus on some of these challenges asso
 ciated with building next-generation high-bandwidth optical devices\, incl
 uding co-packaging optics with ASICs\, as well as discussing possible path
 s for mitigating some of these challenges using innovations in advanced pa
 ckaging processes and materials. Optimizing advanced packaging architectur
 es for optical devices can help scale the next generation of optical inter
 connects while reducing cost per bit and power per bit metrics that are cr
 itical for adoption of these devices in volume across the hyperscale netwo
 rking ecosystem.&lt;/p&gt;
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