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DTSTAMP:20221210T193821Z
UID:852DFD14-2C79-4028-8F7A-525E7B1488CE
DTSTART;TZID=America/New_York:20221125T110000
DTEND;TZID=America/New_York:20221125T120000
DESCRIPTION:Progress in computation and communication is increasingly bottl
 enecked by integrated circuit I/O. Previously reserved for communication o
 ver 100’s of kilometres\, today optical links are widely viewed as the p
 rimary solution for chip-to-chip links above 100 Gbps and up to 1 km. Mean
 while\, CMOS technology scaling has led us toward integrated circuit trans
 ceivers that are\, essentially\, complete modems: thin but critical analog
  front-end circuits and a large custom DSP. This presentation will describ
 e how to co-design DSP-based transceivers and the associated optical compo
 nents to create optical links serving future datacentre communication need
 s. As an example\, a 4-PAM CMOS linear TIA designed in a FinFET technology
  consuming less than 50 mW and co-packaged alongside photodiodes is presen
 ted. The circuits and packaging are co-designed to maximize the passive fr
 ont-end BW. Experimental results confirm the integrated optical fibre rece
 iver operates up to 160-Gb/s using a single wavelength with a suitable DSP
 .\n\nCo-sponsored by: Professor Vincent Gaudet\n\nSpeaker(s): Tony Chan Ca
 rusone\, \n\nRoom: 3142\, Bldg: EIT\, University of Waterloo\, 200 Univers
 ity Ave. West\, Waterloo\, Ontario\, Canada
LOCATION:Room: 3142\, Bldg: EIT\, University of Waterloo\, 200 University A
 ve. West\, Waterloo\, Ontario\, Canada
ORGANIZER:jrlong@uwaterloo.ca
SEQUENCE:0
SUMMARY:Optimization of DSP-Based Optical Communication Links Beyond 100Gbp
 s
URL;VALUE=URI:https://events.vtools.ieee.org/m/337367
X-ALT-DESC:Description: <br /><p>Progress in computation and communication 
 is increasingly bottlenecked by integrated circuit I/O. Previously reserve
 d for communication over 100&rsquo\;s of kilometres\, today optical links 
 are widely viewed as the primary solution for chip-to-chip links above 100
  Gbps and up to 1 km. Meanwhile\, CMOS technology scaling has led us towar
 d integrated circuit transceivers that are\, essentially\, complete modems
 : thin but critical analog front-end circuits and a large custom DSP. This
  presentation will describe how to co-design DSP-based transceivers and th
 e associated optical components to create optical links serving future dat
 acentre communication needs. As an example\, a 4-PAM CMOS linear TIA desig
 ned in a FinFET technology consuming less than 50 mW and co-packaged along
 side photodiodes is presented. The circuits and packaging are co-designed 
 to maximize the passive front-end BW. Experimental results confirm the int
 egrated optical fibre receiver operates up to 160-Gb/s using a single wave
 length with a suitable DSP.</p>
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