BEGIN:VCALENDAR VERSION:2.0 PRODID:IEEE vTools.Events//EN CALSCALE:GREGORIAN BEGIN:VTIMEZONE TZID:Asia/Kolkata BEGIN:STANDARD DTSTART:19451014T230000 TZOFFSETFROM:+0630 TZOFFSETTO:+0530 TZNAME:IST END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20230131T114917Z UID:B6226728-DE1D-41D5-A9A7-463759BB431C DTSTART;TZID=Asia/Kolkata:20221205T110000 DTEND;TZID=Asia/Kolkata:20221210T110000 DESCRIPTION:IEEE MVSR SB Circuits and Systems Society Chapter in collaborat ion with department of Electronics and Communication Engineering\, MVSREC has organized a one-week value added course on “Analog and Digital VLSI Design using Cadence tools” from 5th December 2022 to 10th December 2022 . The main objective of this course was to provide hands-on training on VL SI design technologies to final year students which will help them for pla cements and higher education.\n\nDAY-1: Guest Lecture on VLSI Design\n\nTh e morning session of Day-1 started with Dr. S. Suryanarayana\, HOD\, ECE D eptartment\, MVSREC\, addressed the gathering. Then\, Mr. Gautham Purohit\ , Chairperson\, IEEE MVSR CASS\, welcomed everyone to the 5-day long Value added course and gave a brief about the schedule that will be followed th roughout the course. After that\, Mr. E. Sai Vineeth\, Treasurer\, IEEE MV SR CASS\, gave an introduction about the speaker for the session.\n\nAfter the introduction\, Mr. G. Raju\, came onto the stage and started the sess ion. The main points that were covered in the session are about the differ ent layers present on a chip\, about the hierarchy in which the chips are produced\, about different level present in VLSI chip design and about the various job opportunities present at different stages.\n\nFinally\, the m orning session came to an end successfully as Mr. Gautham Purohit gave a v ote of thanks.\n\nIn the Afternoon session\, the hands-on training started as all the students were taken to the Cadence lab in ECE Department. Mrs. S. Aruna gave a brief explanation about all the basic pre-requisite conce pts needed for VLSI design. In addition to this\, an introduction to the C adence Virtuoso tool was given to the students and basic circuits like Inv erter\, NAND gate were realised in the software.\n\nDAY-2\n\nThe second da y focused on giving more practise for students on Cadence Virtuoso in the Cadence lab to help the students get good knowledge on using the software. Many circuits like NOR Gate\, NAND Gate\, XOR Gate were realized in the s oftware.\n\nDAY-3\n\nIn the morning session students realised complex circ uits in Analog design such as CS Amplifiers and then physical design for a ll the circuits using Layout Design were done in this session. This was th e last session for Analog Design concepts.\n\nIn the afternoon session\, i ntroduction to Digital design concepts was given by Mrs. Smithashree Mohap atra. Students were introduced to Digital design software like Cadence Gen us\, Innovus and Incisive.\n\nDAY-4\n\nOn this day\, students focused on b uilding and realizing various digital circuits such as adders\, subtractor s\, Ripple carry adders and Counters. The main idea was to give good knowl edge on using the Cadence Genus\, Innovus and Incisive software and to get good hands-on practise on those softwares.\n\nDAY-5\n\nOn this day\, stud ents practiced all the circuits and all the queries were answered by the r esource persons. In addition to this\, students formed various teams of si ze 3-4 members and selected a mini-project to work on. All the projects we re realized on this day under the guidance of resource persons\, Mrs. S. A runa and Mrs. Smithashree Mohapatra.\n\nIn addition to this\, a test was c onducted on this day on both Analog design and Digital design concepts tha t were taught to the students in all the previous sessions.\n\nAt last\, t he five-day long value-added course ended with Dr. D. Suryanarayana\, HOD\ , ECE Dept.\, MVSREC addressed all the students and guided on getting jobs in VLSI domain in future.\n\nFinally\, on the next day all the students s ubmitted their mini-projects and the five-day long value-added course fini shed successfully after the certificates were issued to the students in th e Valedictory session.\n\nSpeaker(s): Mr. Raju Ganagani\, Mrs. S.Aruna\n\n Bldg: ECE Block\, MVSR Engineering College\, Nadergul\, Hyderabad\, Hydera bad\, Andhra Pradesh\, India\, 501510 LOCATION:Bldg: ECE Block\, MVSR Engineering College\, Nadergul\, Hyderabad\ , Hyderabad\, Andhra Pradesh\, India\, 501510 ORGANIZER:ieeemvsrsb@mvsrec.edu.in SEQUENCE:0 SUMMARY:ANALOG AND DIGITAL VLSI DESIGN USING CADENCE TOOLS URL;VALUE=URI:https://events.vtools.ieee.org/m/346107 X-ALT-DESC:Description: <br /><p>IEEE MVSR SB Circuits and Systems Society Chapter in collaboration with department of Electronics and Communication Engineering\, MVSREC has organized a one-week value added course on &ldquo \;Analog and Digital VLSI Design using Cadence tools&rdquo\; from 5<sup>th </sup> December 2022 to 10<sup>th</sup> December 2022. The main objective of this course was to provide hands-on training on VLSI design technologie s to final year students which will help them for placements and higher ed ucation.</p>\n<p><strong>DAY-1: Guest Lecture on VLSI Design</strong></p>\ n<p>The morning session of Day-1 started with Dr. S. Suryanarayana\, HOD\, ECE Deptartment\, MVSREC\, addressed the gathering. Then\, Mr. Gautham Pu rohit\, Chairperson\, IEEE MVSR CASS\, welcomed everyone to the 5-day long Value added course and gave a brief about the schedule that will be follo wed throughout the course. After that\, Mr. E. Sai Vineeth\, Treasurer\, I EEE MVSR CASS\, gave an introduction about the speaker for the session.</p >\n<p>After the introduction\, Mr. G. Raju\, came onto the stage and start ed the session. The main points that were covered in the session are about the different layers present on a chip\, about the hierarchy in which the chips are produced\, about different level present in VLSI chip design an d about the various job opportunities present at different stages.</p>\n<p >Finally\, the morning session came to an end successfully as Mr. Gautham Purohit gave a vote of thanks.</p>\n<p>In the Afternoon session\, the hand s-on training started as all the students were taken to the Cadence lab in ECE Department. Mrs. S. Aruna gave a brief explanation about all the basi c pre-requisite concepts needed for VLSI design. In addition to this\, an introduction to the Cadence Virtuoso tool was given to the students and ba sic circuits like Inverter\, NAND gate were realised in the software.</p>\ n<p><strong>DAY-2</strong></p>\n<p>The second day focused on giving more p ractise for students on Cadence Virtuoso in the Cadence lab to help the st udents get good knowledge on using the software. Many circuits like NOR Ga te\, NAND Gate\, XOR Gate were realized in the software.</p>\n<p><strong>D AY-3</strong></p>\n<p>In the morning session students realised complex cir cuits in Analog design such as CS Amplifiers and then physical design for all the circuits using Layout Design were done in this session. This was t he last session for Analog Design concepts.</p>\n<p>In the afternoon sessi on\, introduction to Digital design concepts was given by Mrs. Smithashree Mohapatra. Students were introduced to Digital design software like Caden ce Genus\, Innovus and Incisive.</p>\n<p><strong>DAY-4</strong></p>\n<p>On this day\, students focused on building and realizing various digital cir cuits such as adders\, subtractors\, Ripple carry adders and Counters. The main idea was to give good knowledge on using the Cadence Genus\, Innovus and Incisive software and to get good hands-on practise on those software s.</p>\n<p><strong>DAY-5</strong></p>\n<p>On this day\, students practiced all the circuits and all the queries were answered by the resource person s. In addition to this\, students formed various teams of size 3-4 members and selected a mini-project to work on. All the projects were realized on this day under the guidance of resource persons\, Mrs. S. Aruna and Mrs. Smithashree Mohapatra.</p>\n<p>In addition to this\, a test was conducted on this day on both Analog design and Digital design concepts that were ta ught to the students in all the previous sessions.</p>\n<p>At last\, the f ive-day long value-added course ended with Dr. D. Suryanarayana\, HOD\, EC E Dept.\, MVSREC addressed all the students and guided on getting jobs in VLSI domain in future.</p>\n<p>Finally\, on the next day all the students submitted their mini-projects and the five-day long value-added course fin ished successfully after the certificates were issued to the students in t he Valedictory session.</p> END:VEVENT END:VCALENDAR