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DTSTAMP:20230326T180226Z
UID:7D9D15EE-7561-4BE8-9891-EE1323466D32
DTSTART;TZID=America/New_York:20230323T170000
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DESCRIPTION:Progress in computation and communication is increasingly bottl
 enecked by integrated circuit I/0. CMOS technology scaling has enabled the
  integration of hundreds of complete modems operating over 100Gbps on a si
 ngle chip. Whereas optical links were previously reserved for communicatio
 n over 100's of kilometres\, they are now the primary solution for chip-to
 -chip links above 100 Gbps over any distance beyond a few metres. Co-packa
 ged optics (CPO) bring optics right to the perimeter of our electronic int
 egrated circuits\, and may therefore appear to be a natural continuation o
 f this trend.\nIndeed\, PO holds the promise of simultaneously lowering sy
 stem power consumption\, decreasing I/0 latency\, and increasing the total
  bandwidth of chip I/O. And yet\, at the same time\, it has the potential 
 to increase the power density\, increase the cost\, and limit the bandwidt
 h density of our\nchio I/O. This talk will clarify these seeming contradic
 tions\, and paint a realistic picture of CPO's role in future connectivity
 .\n\nCo-sponsored by: SPIE OPTICA Student Chapter\n\nSpeaker(s): Dr. Tony 
 Chan Carusone\, \n\nRoom: GB119\, Bldg: Galbraith Building\, University of
  Toronto\, Toronto\, Ontario\, Canada
LOCATION:Room: GB119\, Bldg: Galbraith Building\, University of Toronto\, T
 oronto\, Ontario\, Canada
ORGANIZER:dustin.dunwell@gmail.com
SEQUENCE:4
SUMMARY:THE ROLE OF CO-PACKAGED OPTICS IN OUR CONNECTED FUTURE
URL;VALUE=URI:https://events.vtools.ieee.org/m/352381
X-ALT-DESC:Description: <br /><p>Progress in computation and communication 
 is increasingly bottlenecked by integrated circuit I/0. CMOS technology sc
 aling has enabled the integration of hundreds of complete modems operating
  over 100Gbps on a single chip. Whereas optical links were previously rese
 rved for communication over 100's of kilometres\, they are now the primary
  solution for chip-to-chip links above 100 Gbps over any distance beyond a
  few metres. Co-packaged optics (CPO) bring optics right to the perimeter 
 of our electronic integrated circuits\, and may therefore appear to be a n
 atural continuation of this trend.<br />Indeed\, PO holds the promise of s
 imultaneously lowering system power consumption\, decreasing I/0 latency\,
  and increasing the total bandwidth of chip I/O. And yet\, at the same tim
 e\, it has the potential to increase the power density\, increase the cost
 \, and limit the bandwidth density of our<br />chio I/O. This talk will cl
 arify these seeming contradictions\, and paint a realistic picture of CPO'
 s role in future connectivity.</p>
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