BEGIN:VCALENDAR VERSION:2.0 PRODID:IEEE vTools.Events//EN CALSCALE:GREGORIAN BEGIN:VTIMEZONE TZID:Asia/Kolkata BEGIN:STANDARD DTSTART:19451014T230000 TZOFFSETFROM:+0630 TZOFFSETTO:+0530 TZNAME:IST END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20230423T141442Z UID:EFE080E3-6C09-4414-861F-C6A91226CE97 DTSTART;TZID=Asia/Kolkata:20230413T110000 DTEND;TZID=Asia/Kolkata:20230413T140000 DESCRIPTION:Reconfigurable systems are increasingly being employed in a lar ge class of today’s heterogeneous real-time systems which often demand s atisfaction of stringent timeliness constraints. However\, executing a set of hard real-time applications on reconfigurable systems such that all ti ming constraints are satisfied while also allowing efficient resource util ization requires effective scheduling\, mapping and admission control stra tegies. In case of hardware tasks the reconfigurable space can considered as partitioned into tiles\, which can be mapped to the tasks based on logi c requirement and execution deadline. The tradeoff between task throughput \, resource and energy requirements can be suitably handled in the run tim e by considering suitable hardware variants of the tasks that can be mappe d through full/partial reconfiguration.\n\nThis lecture will brief on the preliminary concepts of task processing on FPGAs using soft and hard cores and the related architectural design. Scheduling strategies will also be introduced in regards to efficient mapping of tasks on reconfigurable core s both in full and partial reconfiguration domain.\n\nSpeaker(s): Dr. Amla n Chakrabarti\n\nAgenda: \nAgendas for the event on"Scheduling Approaches for Accelerating Real-Time Tasks in Software-Hardware Codesign Paradigm":\ n\n-\nIntroduction to software-hardware codesign paradigm and its importan ce in modern computing systems.\n\n-\nOverview of real-time systems and th eir characteristics\, including the importance of meeting timing constrain ts for such systems.\n\n-\nThe role of scheduling in real-time systems and the challenges involved in designing efficient scheduling algorithms.\n\n -\nA survey of existing scheduling approaches for real-time systems\, incl uding fixed-priority scheduling\, dynamic priority scheduling\, and other approaches.\n\n-\nIntroduction to hardware acceleration and its potential for speeding up real-time tasks.\n\n-\nOverview of the integration of hard ware acceleration into real-time systems and the benefits it offers\n\n-\n Discussion of software-hardware co-design techniques for optimizing the pe rformance of real-time systems\, including scheduling algorithms that leve rage hardware acceleration.\n\n-\nCase studies of real-world systems that have successfully implemented software-hardware co-design techniques for r eal-time tasks.\n\n-\nFuture directions and challenges\n\nRoom: 101\, Bldg : A\, Nirma University\, S G Highway \, Ahmedabad – 382481\, Gujarat\, I ndia\, Ahmedabad\, Gujarat\, India\, 382481 LOCATION:Room: 101\, Bldg: A\, Nirma University\, S G Highway \, Ahmedabad – 382481\, Gujarat\, India\, Ahmedabad\, Gujarat\, India\, 382481 ORGANIZER:ieee@nirmauni.ac.in SEQUENCE:14 SUMMARY:Scheduling Approaches for Accelerating Real-Time Tasks in Software- Hardware Codesign Paradigm URL;VALUE=URI:https://events.vtools.ieee.org/m/356289 X-ALT-DESC:Description: <br /><p>Reconfigurable systems are increasingly be ing employed in a large class of today&rsquo\;s heterogeneous real-time sy stems which often demand satisfaction of stringent timeliness constraints. However\, executing a set of hard real-time applications on reconfigurabl e systems such that all timing constraints are satisfied while also allowi ng efficient resource utilization requires effective scheduling\, mapping and admission control strategies. In case of hardware tasks the reconfigur able space can considered as partitioned into tiles\, which can be mapped to the tasks based on logic requirement and execution deadline. The tradeo ff between task throughput\, resource and energy requirements can be suita bly handled in the run time by considering suitable hardware variants of t he tasks that can be mapped through full/partial reconfiguration.</p>\n<p> This lecture will brief on the preliminary concepts of task processing on FPGAs using soft and hard cores and the related architectural design. Sche duling strategies will also be introduced in regards to efficient mapping of tasks on reconfigurable cores both in full and partial reconfiguration domain.</p><br /><br />Agenda: <br /><p>&nbsp\;Agendas for the event on"Sc heduling Approaches for Accelerating Real-Time Tasks in Software-Hardware Codesign Paradigm":</p>\n<ol>\n<li>\n<p>Introduction to software-hardware codesign paradigm and its importance in modern computing systems.</p>\n</l i>\n<li>\n<p>Overview of real-time systems and their characteristics\, inc luding the importance of meeting timing constraints for such systems.</p>\ n</li>\n<li>\n<p>The role of scheduling in real-time systems and the chall enges involved in designing efficient scheduling algorithms.</p>\n</li>\n< li>\n<p>A survey of existing scheduling approaches for real-time systems\, including fixed-priority scheduling\, dynamic priority scheduling\, and o ther approaches.</p>\n</li>\n<li>\n<p>Introduction to hardware acceleratio n and its potential for speeding up real-time tasks.</p>\n</li>\n<li>\n<p> Overview of the integration of hardware acceleration into real-time system s and the benefits it offers</p>\n</li>\n<li>\n<p>Discussion of software-h ardware co-design techniques for optimizing the performance of real-time s ystems\, including scheduling algorithms that leverage hardware accelerati on.</p>\n</li>\n<li>\n<p>&nbsp\;Case studies of real-world systems that ha ve successfully implemented software-hardware co-design techniques for rea l-time tasks.</p>\n</li>\n<li>\n<p>Future directions and challenges</p>\n< /li>\n</ol> END:VEVENT END:VCALENDAR