BEGIN:VCALENDAR VERSION:2.0 PRODID:IEEE vTools.Events//EN CALSCALE:GREGORIAN BEGIN:VTIMEZONE TZID:America/Los_Angeles BEGIN:DAYLIGHT DTSTART:20230312T030000 TZOFFSETFROM:-0800 TZOFFSETTO:-0700 RRULE:FREQ=YEARLY;BYDAY=2SU;BYMONTH=3 TZNAME:PDT END:DAYLIGHT BEGIN:STANDARD DTSTART:20231105T010000 TZOFFSETFROM:-0700 TZOFFSETTO:-0800 RRULE:FREQ=YEARLY;BYDAY=1SU;BYMONTH=11 TZNAME:PST END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20230515T063122Z UID:7A8C0217-D51C-486B-9B66-D61A1BB96846 DTSTART;TZID=America/Los_Angeles:20230508T180000 DTEND;TZID=America/Los_Angeles:20230508T200000 DESCRIPTION:System-in-Package (SiP) technology provides a great opportunity for consumer electronics companies to make products with smaller form fac tor\, more functions\, and better reliability performance. One key reason for SiP’s success is the encapsulated structure using molding compound\, which can provide protection to all the components inside and allows redu ced component-to-component spacing. However\, if the design or the manufac turing process have flaws\, failures can also happen inside of SiP\, and e ngineers have to spend much more efforts and time to conduct fault isolati on\, understand the root cause\, and make related corrective actions. In t his regard\, risks are borne not only by the SiP manufacturers\, but also the system integrators and Original Equipment Manufacturers (OEMs) who nee ds to assemble SiP into the final product. Therefore\, a comprehensive des ign and manufacturing assessment plan and an effective validation method a t an early stage of the SiP development will be extremely critical so that the risk can be identified in advance\, and the impact to the product lau nch can be minimized. This paper focuses on two types of encapsulant relat ed failures\, molding void and component internal delamination. By present ing several cases that are encountered during SiP development\, their fail ure mechanisms are studied\, and the methodology to detect the failure and assess the risk are also discussed.\n\nSpeaker(s): Dr Yuan Zhang\, \n\nBl dg: Mountain View Community Center\, 201S. Rengstorff Avenue\, mountain vi ew\, California\, United States\, 94040 LOCATION:Bldg: Mountain View Community Center\, 201S. Rengstorff Avenue\, m ountain view\, California\, United States\, 94040 ORGANIZER:ieeescvrelteam@googlegroups.com SEQUENCE:2 SUMMARY:Validation and Risk Assessment Method for System-in-Package Design URL;VALUE=URI:https://events.vtools.ieee.org/m/360039 X-ALT-DESC:Description: <br /><p data-key="77"><span data-key="78">System-i n-Package (SiP) technology provides a great opportunity for consumer elect ronics companies to make products with smaller form factor\, more function s\, and better reliability performance. One key reason for SiP&rsquo\;s su ccess is the encapsulated structure using molding compound\, which can pro vide protection to all the components inside and allows reduced component- to-component spacing. However\, if the design or the manufacturing process have flaws\, failures can also happen inside of SiP\, and engineers have to spend much more efforts and time to conduct fault isolation\, understan d the root cause\, and make related corrective actions. In this regard\, r isks are borne not only by the SiP manufacturers\, but also the system int egrators and Original Equipment Manufacturers (OEMs) who needs to assemble SiP into the final product. Therefore\, a comprehensive design and manufa cturing assessment plan and an effective validation method at an early sta ge of the SiP development will be extremely critical so that the risk can be identified in advance\, and the impact to the product launch can be min imized. This paper focuses on two types of encapsulant related failures\, molding void and component internal delamination. By presenting several ca ses that are encountered during SiP development\, their failure mechanisms are studied\, and the methodology to detect the failure and assess the ri sk are also discussed. </span></p> END:VEVENT END:VCALENDAR