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DTSTAMP:20230713T210414Z
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DESCRIPTION:WBG semiconductors (i.e. SiC and GaN) outperform silicon in ter
 ms of breakdown field (10X in the case of SiC) and thermal conductivity (2
 X in the case of SiC)\, hence\, ensuring smaller conduction losses and bet
 ter heat dissipation combined with faster switching frequency. All this re
 sults in saving energy (i.e. smaller battery) and costs (i.e. smaller pass
 ive components and volume of the power module). However\, to take fully ad
 vantage of WBG semiconductors it is of paramount importance to: (i) develo
 p new packaging technologies\, (ii) optimize the packaging design in terms
  of thermo-electric and electromagnetic (i.e. stray inductance and mutual 
 coupling) behavior to ensure clean and fast switching of the MOSFETs and a
 void oscillations. This talk will start from basic concepts of power modul
 e design by taking a half-bridge topology as reference and will show some 
 of the tools and methodologies that are currently used for the optimizatio
 n. Moreover\, the talk will briefly describe some of the new advanced tech
 nologies (embedding\, chip scale packaging\, sintering) for the packaging 
 of GaN and SiC power modules.\n\nSpeaker(s): Dr. Giovanni Salvatore\, \n\n
 Virtual: https://events.vtools.ieee.org/m/361989
LOCATION:Virtual: https://events.vtools.ieee.org/m/361989
ORGANIZER:p.wesling@ieee.org
SEQUENCE:12
SUMMARY:Advanced Packaging for Wide Bandgap Semiconductor Power Modules
URL;VALUE=URI:https://events.vtools.ieee.org/m/361989
X-ALT-DESC:Description: <br /><p><span style="font-size: 12pt\;">WBG semico
 nductors (i.e. SiC and GaN) outperform silicon in terms of breakdown field
  (10X in the case of SiC) and thermal conductivity (2X in the case of SiC)
 \, hence\, ensuring smaller conduction losses and better heat dissipation 
 combined with faster switching frequency. All this results in saving energ
 y (i.e. smaller battery) and costs (i.e. smaller passive components and vo
 lume of the power module). However\, to take fully advantage of WBG semico
 nductors it is of paramount importance to: (i) develop new packaging techn
 ologies\, (ii) optimize the packaging design in terms of thermo-electric a
 nd electromagnetic (i.e. stray inductance and mutual coupling) behavior to
  ensure clean and fast switching of the MOSFETs and avoid oscillations. Th
 is talk will start from basic concepts of power module design by taking a 
 half-bridge topology as reference and will show some of the tools and meth
 odologies that are currently used for the optimization. Moreover\, the tal
 k will briefly describe some of the new advanced technologies (embedding\,
  chip scale packaging\, sintering) for the packaging of GaN and SiC power 
 modules.</span></p>
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