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DTSTAMP:20230612T091730Z
UID:81EFD439-9FCE-4317-BBB3-209D48D6F1E7
DTSTART;TZID=Europe/Zurich:20230606T140000
DTEND;TZID=Europe/Zurich:20230606T153000
DESCRIPTION:Seminar title: Modeling of Memory Device with Bistable Dynamic 
 Time Varying Characteristics\n\nAbstract: The field of neuromorphic comput
 ing has rapidly advanced in recent years\, driving a significant demand fo
 r memory array simulation. However\, the existing circuit simulation metho
 dology is not optimized for the unique characteristics of memory devices\,
  which are time-varying and possess multiple outputs for the same input\, 
 depending on the internal state of the device. This has created a need for
  a new memory modeling platform that can capture these dynamic changes and
  multiple internal states. In this presentation\, we will discuss the simu
 lation infrastructure required for such memory modeling\, along with recen
 t progress in the development of neural network models that can quickly ca
 pture the characteristics of memory devices.\n\nCo-sponsored by: Jean-Mich
 el Sallese\n\nSpeaker(s): Mansun Chan\, \n\nRoom: 328\, Bldg: ELB \, EPFL 
 Lausanne\, Lausanne\, Switzerland\, Switzerland\, 1015 Lausanne
LOCATION:Room: 328\, Bldg: ELB \, EPFL Lausanne\, Lausanne\, Switzerland\, 
 Switzerland\, 1015 Lausanne
ORGANIZER:jean-michel.sallese@epfl.ch
SEQUENCE:27
SUMMARY:IEEE Swiss ED DL Lecture by Prof. Mansun Chan
URL;VALUE=URI:https://events.vtools.ieee.org/m/362693
X-ALT-DESC:Description: <br /><p><strong>Seminar title:&nbsp\;</strong>Mode
 ling of Memory Device with Bistable Dynamic Time Varying Characteristics</
 p>\n<p><strong>Abstract:</strong> The field of neuromorphic computing has 
 rapidly advanced in recent years\, driving a significant demand for memory
  array simulation. However\, the existing circuit simulation methodology i
 s not optimized for the unique characteristics of memory devices\, which a
 re time-varying and possess multiple outputs for the same input\, dependin
 g on the internal state of the device. This has created a need for a new m
 emory modeling platform that can capture these dynamic changes and multipl
 e internal states. In this presentation\, we will discuss the simulation i
 nfrastructure required for such memory modeling\, along with recent progre
 ss in the development of neural network models that can quickly capture th
 e characteristics of memory devices.</p>\n<p>&nbsp\;</p>
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