BEGIN:VCALENDAR
VERSION:2.0
PRODID:IEEE vTools.Events//EN
CALSCALE:GREGORIAN
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TZID:Australia/Sydney
BEGIN:DAYLIGHT
DTSTART:20231001T030000
TZOFFSETFROM:+1000
TZOFFSETTO:+1100
RRULE:FREQ=YEARLY;BYDAY=1SU;BYMONTH=10
TZNAME:AEDT
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DTSTART:20230402T020000
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RRULE:FREQ=YEARLY;BYDAY=1SU;BYMONTH=4
TZNAME:AEST
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20231211T031708Z
UID:DF04F413-E68C-49D6-A9F5-0A35A48366B6
DTSTART;TZID=Australia/Sydney:20230616T160000
DTEND;TZID=Australia/Sydney:20230616T170000
DESCRIPTION:FPGAs\, SoCs and ASICs are the key computational elements found
  at the core of almost all high performing computational electronics. Thes
 e computing elements leverage the power of parallel processing to deliver 
 performance a traditional processor could only dream of which is gaining m
 ore and more popularity at an accelerating rate due to the global adoption
  of AI which is built on parallel computation. In this talk we will explor
 e the building blocks within these technologies\, discuss how the are conf
 igured and contrast them with traditional sequential processing found in C
 PUs.\n\nVirtual: https://events.vtools.ieee.org/m/363698
LOCATION:Virtual: https://events.vtools.ieee.org/m/363698
ORGANIZER:naila.mukhtar@ieee.org
SEQUENCE:12
SUMMARY:Fundamentals of FPGAs\, SOCs\, and ASICs for Real World
URL;VALUE=URI:https://events.vtools.ieee.org/m/363698
X-ALT-DESC:Description: &lt;br /&gt;&lt;p&gt;FPGAs\, SoCs and ASICs are the key computa
 tional elements found at the core of almost all high performing computatio
 nal electronics. These computing elements leverage the power of parallel p
 rocessing to deliver performance a traditional processor could only dream 
 of which is gaining more and more popularity at an accelerating rate due t
 o the global adoption of AI which is built on parallel computation. In thi
 s talk we will explore the building blocks within these technologies\, dis
 cuss how the are configured and contrast them with traditional sequential 
 processing found in CPUs.&lt;/p&gt;
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