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DTSTART:20230312T030000
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DTSTART:20231105T010000
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DTSTAMP:20230906T144931Z
UID:F2E3CA6D-DAE6-4391-9FFB-2AEE7F878B05
DTSTART;TZID=America/New_York:20230830T183000
DTEND;TZID=America/New_York:20230830T200000
DESCRIPTION:The rapid development of the nano-electronic industry over the 
 past decades has relied on the process of transistor scaling to provide si
 gnificant improvements to transistor performance at a reduced cost. Multip
 le directions have been pursued to extend the semiconductor industry&#39;s gro
 wing trend\, including searching for new material systems\, designing new 
 transistor structures\, demonstrating new functionalities\, and developing
  new applications. The semiconductor chip has two main elements: active de
 vices (i.e.\, transistors) and interconnects. As for active devices\, new 
 2-D materials (MoS2\, WS2\, BN\, etc.) are all aggressively studied to rea
 lize high energy efficiency and memory/logic functions for system compactn
 ess. Since the discovery of graphene in 2004\, researchers have focused on
  layer-structured materials and their applications in electron devices. Th
 is talk will present the current status and possible application developme
 nts in nanoelectronics and nanomaterials. A brief introduction is discusse
 d to the general nanoelectronics and 2D materials for device applications.
  The technical challenges of 2D materials are discussed. This talk will in
 troduce various technologies that are based on 2D materials and will be di
 scussed possible applications. In addition\, traditional silicon-based dev
 ices and the nanotechnology-enabled high-performance device will be discus
 sed.\n\nCo-sponsored by: Northern Virginia/Washington Chap\,ED15\,SSC37\,E
 P21\n\nSpeaker(s): Prof. Jeongwon Park\, \n\nVirtual: https://events.vtool
 s.ieee.org/m/369321
LOCATION:Virtual: https://events.vtools.ieee.org/m/369321
ORGANIZER:fsemendy@ieee.org 
SEQUENCE:35
SUMMARY:From Transistor Scaling to 2D Materials: A Journey into Nanoelectro
 nics
URL;VALUE=URI:https://events.vtools.ieee.org/m/369321
X-ALT-DESC:Description: &lt;br /&gt;&lt;p&gt;The rapid development of the nano-electron
 ic industry over the past decades has relied on the process of transistor 
 scaling to provide significant improvements to transistor performance at a
  reduced cost. Multiple directions have been pursued to extend the semicon
 ductor industry&#39;s growing trend\, including searching for new material sys
 tems\, designing new transistor structures\, demonstrating new functionali
 ties\, and developing new applications. The semiconductor chip has two mai
 n elements: active devices (i.e.\, transistors) and interconnects. As for 
 active devices\, new 2-D materials (MoS&lt;sub&gt;2&lt;/sub&gt;\, WS&lt;sub&gt;2&lt;/sub&gt;\, BN\
 , etc.) are all aggressively studied to realize high energy efficiency and
  memory/logic functions for system compactness. Since the discovery of gra
 phene in 2004\, researchers have focused on layer-structured materials and
  their applications in electron devices. This talk will present the curren
 t status and possible application developments in nanoelectronics and nano
 materials. A brief introduction is discussed to the general nanoelectronic
 s and 2D materials for device applications. The technical challenges of 2D
  materials are discussed. This talk will introduce various technologies th
 at are based on 2D materials and will be discussed possible applications. 
 In addition\, traditional silicon-based devices and the nanotechnology-ena
 bled high-performance device will be discussed.&lt;/p&gt;
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