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DTSTAMP:20230929T141158Z
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DESCRIPTION:This talk will cover practical challenges for cryogenic CMOS de
 signs for next\ngeneration quantum computing. Starting from system level\,
  it will detail the design\nconsiderations for a non-multiplexed\, semi-au
 tonomous\, transmon qubit state controller (QSC)\nimplemented in 14nm CMOS
  FinFET technology. The QSC includes an augmented general-\npurpose digita
 l processor that supports waveform generation and phase rotation operation
 s\ncombined with a low power current-mode single sideband upconversion I/Q
  mixer-based RF\narbitrary waveform generator (AWG). Implemented in 14nm C
 MOS FinFET technology\, the QSC\ngenerates control signals in its target 4
 .5GHz to 5.5 GHz frequency range\, achieving an SFDR >\n50dB for a signal 
 bandwidth of 500MHz. With the controller operating in the 4K stage of a\nc
 ryostat and connected to a transmon qubit in the cryostat’s millikelvin 
 stage\, measured\ntransmon T1 and T2 coherence times were 75.7μs and 73μ
 s\, respectively\, in each case\ncomparable to results achieved using conv
 entional room temperature controls. In further tests\nwith transmons\, a q
 ubit-limited error rate of 7.76x10-4 per Clifford gate is achieved\, again
 \ncomparable to results achieved using room temperature controls. The QSC
 ’s maximum RF\noutput power is -18 dBm\, and power dissipation per qubit
  under active control is 23mW.\n\nSpeaker(s): \, Sudipto\n\nRoom: 3142\, B
 ldg: EIT\, University of Waterloo\, 200 University Avenue West\, Waterloo\
 , Ontario\, Canada\, N2L 3G4
LOCATION:Room: 3142\, Bldg: EIT\, University of Waterloo\, 200 University A
 venue West\, Waterloo\, Ontario\, Canada\, N2L 3G4
ORGANIZER:jrlong@uwaterloo.ca
SEQUENCE:18
SUMMARY:Low-Power Cryo-CMOS Design for Quantum Computing Applications
URL;VALUE=URI:https://events.vtools.ieee.org/m/374393
X-ALT-DESC:Description: <br /><p>This talk will cover practical challenges 
 for cryogenic CMOS designs for next<br />generation quantum computing. Sta
 rting from system level\, it will detail the design<br />considerations fo
 r a non-multiplexed\, semi-autonomous\, transmon qubit state controller (Q
 SC)<br />implemented in 14nm CMOS FinFET technology. The QSC includes an a
 ugmented general-<br />purpose digital processor that supports waveform ge
 neration and phase rotation operations<br />combined with a low power curr
 ent-mode single sideband upconversion I/Q mixer-based RF<br />arbitrary wa
 veform generator (AWG). Implemented in 14nm CMOS FinFET technology\, the Q
 SC<br />generates control signals in its target 4.5GHz to 5.5 GHz frequenc
 y range\, achieving an SFDR &gt\;<br />50dB for a signal bandwidth of 500M
 Hz. With the controller operating in the 4K stage of a<br />cryostat and c
 onnected to a transmon qubit in the cryostat&rsquo\;s millikelvin stage\, 
 measured<br />transmon T1 and T2 coherence times were 75.7&mu\;s and 73&mu
 \;s\, respectively\, in each case<br />comparable to results achieved usin
 g conventional room temperature controls. In further tests<br />with trans
 mons\, a qubit-limited error rate of 7.76x10-4 per Clifford gate is achiev
 ed\, again<br />comparable to results achieved using room temperature cont
 rols. The QSC&rsquo\;s maximum RF<br />output power is -18 dBm\, and power
  dissipation per qubit under active control is 23mW.</p>
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