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DTSTAMP:20230929T025223Z
UID:896347FE-AA4B-4807-8548-A4EE196F3DF2
DTSTART;TZID=America/New_York:20230927T170000
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DESCRIPTION:This talk will cover practical challenges for cryogenic CMOS de
 signs for next generation quantum computing. Starting from system level\, 
 it will detail the design considerations for a non-multiplexed\, semi-auto
 nomous\, transmon qubit state controller (QSC) implemented in 14nm CMOS Fi
 nFET technology. The QSC includes an augmented general-purpose digital pro
 cessor that supports waveform generation and phase rotation operations com
 bined with a low power current-mode single sideband upconversion I/Q mixer
 -based RF arbitrary waveform generator (AWG). Implemented in 14nm CMOS Fin
 FET technology\, the QSC generates control signals in its target 4.5GHz to
  5.5 GHz frequency range\, achieving an SFDR > 50dB for a signal bandwidth
  of 500MHz. With the controller operating in the 4K stage of a cryostat an
 d connected to a transmon qubit in the cryostat’s millikelvin stage\, me
 asured transmon T1 and T2 coherence times were 75.7μs and 73μs\, respect
 ively\, in each case comparable to results achieved using conventional roo
 m temperature controls. In further tests with transmons\, a qubit-limited 
 error rate of 7.76x10-4 per Clifford gate is achieved\, again comparable t
 o results achieved using room temperature controls. The QSC’s maximum RF
  output power is -18 dBm\, and power dissipation per qubit under active co
 ntrol is 23mW.\n\nSpeaker(s): Sudipto Chakraborty\, \n\nRoom: MP 103\, Bld
 g: McLennan Physical Laboratories\, University of Toronto\, 255 Huron Stre
 et\, Toronto\, Ontario\, Canada\, M5S 1A7
LOCATION:Room: MP 103\, Bldg: McLennan Physical Laboratories\, University o
 f Toronto\, 255 Huron Street\, Toronto\, Ontario\, Canada\, M5S 1A7
ORGANIZER:dustin.dunwell@gmail.com
SEQUENCE:25
SUMMARY:Low power cryo-CMOS design for quantum computing applications
URL;VALUE=URI:https://events.vtools.ieee.org/m/374444
X-ALT-DESC:Description: <br /><p>This talk will cover practical challenges 
 for cryogenic CMOS designs for next generation quantum computing. Starting
  from system level\, it will detail the design considerations for a non-mu
 ltiplexed\, semi-autonomous\, transmon qubit state controller (QSC) implem
 ented in 14nm CMOS FinFET technology.<strong>&nbsp\;</strong>The QSC inclu
 des&nbsp\;an augmented general-purpose digital processor that supports&nbs
 p\;waveform generation and phase rotation operations combined with a low p
 ower current-mode single sideband upconversion I/Q mixer-based RF arbitrar
 y waveform generator (AWG). Implemented in 14nm CMOS FinFET technology\, t
 he QSC generates control signals in its target 4.5GHz to 5.5 GHz frequency
  range\, achieving an SFDR &gt\; 50dB for a signal bandwidth of 500MHz.&nb
 sp\; With the controller operating in the 4K stage of a cryostat and conne
 cted to a transmon qubit in the cryostat&rsquo\;s millikelvin stage\, meas
 ured transmon T<sub>1</sub>&nbsp\;and T<sub>2</sub>&nbsp\;coherence times 
 were 75.7&mu\;s and 73&mu\;s\, respectively\, in each case comparable to r
 esults achieved using conventional room temperature controls. In further t
 ests with transmons\, a qubit-limited error rate of 7.76x10<sup>-4</sup>&n
 bsp\;per Clifford gate is achieved\, again comparable to results achieved 
 using room temperature controls. The QSC&rsquo\;s maximum RF output power 
 is -18 dBm\, and power dissipation per qubit under active control is 23mW.
 </p>
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