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PRODID:IEEE vTools.Events//EN
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DTSTART:20231105T010000
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BEGIN:VEVENT
DTSTAMP:20231013T131914Z
UID:795DBF4E-5C6C-4261-8741-F6FD0AD95D06
DTSTART;TZID=America/Denver:20231010T090000
DTEND;TZID=America/Denver:20231010T103000
DESCRIPTION:We live in the golden age of mm-wave ASIC design! With the rise
  of 5G networks & 6G research\, a massive push for commercialization of mm
 -wave integrated circuits is underway. This tutorial explores the hidden i
 mpairments that are often overlooked or difficult to locate in mm-wave lay
 outs and interconnects. Using real-life fabricated circuit blocks operatin
 g up to and beyond D-band (170GHz)\, as well as optical circuits operating
  beyond 100Gb/s\, the tutorial will explore layout challenges and impairme
 nts that can adversely affect the circuit performance. After modeling thes
 e elements\, simulations demonstrate the impact of the parasitics on bandw
 idth\, center frequency\, stability\, and noise figure. Using simple and q
 uick modeling techniques\, the designers can incorporate effects of variou
 s layout parasitics. Furthermore\, mm-wave techniques at the chip level ar
 e explored from ground planes to flip-chip bumps. Finally\, going beyond t
 he boundaries of integrated circuits\, co-design techniques will be explor
 ed to carry mm-wave signals into packages\, printed circuit boards\, and a
 ntennas.\n\nSpeaker(s): \, Shahriar Shahramian\n\nRoom: 424C\, Bldg: ICT\,
  University of Calgary\, Calgary\, Alberta\, Canada
LOCATION:Room: 424C\, Bldg: ICT\, University of Calgary\, Calgary\, Alberta
 \, Canada
ORGANIZER:lbelosto@ucalgary.ca
SEQUENCE:14
SUMMARY:ISSCC 2023 Tutorial: The Art of mm-Wave Design and Layout
URL;VALUE=URI:https://events.vtools.ieee.org/m/376552
X-ALT-DESC:Description: <br /><p>We live in the golden age of mm-wave ASIC 
 design! With the rise of 5G networks &amp\; 6G research\, a massive push f
 or commercialization of mm-wave integrated circuits is underway. This tuto
 rial explores the hidden impairments that are often overlooked or difficul
 t to locate in mm-wave layouts and interconnects. Using real-life fabricat
 ed circuit blocks operating up to and beyond D-band (170GHz)\, as well as 
 optical circuits operating beyond 100Gb/s\, the tutorial will explore layo
 ut challenges and impairments that can adversely affect the circuit perfor
 mance. After modeling these elements\, simulations demonstrate the impact 
 of the parasitics on bandwidth\, center frequency\, stability\, and noise 
 figure. Using simple and quick modeling techniques\, the designers can inc
 orporate effects of various layout parasitics. Furthermore\, mm-wave techn
 iques at the chip level are explored from ground planes to flip-chip bumps
 . Finally\, going beyond the boundaries of integrated circuits\, co-design
  techniques will be explored to carry mm-wave signals into packages\, prin
 ted circuit boards\, and antennas.</p>
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